ADE7761 Datasheet by Analog Devices Inc.

Datasheet Feedback/Errors

ANALOG DEVICES 36 usecl on the A reterence circuit. All other signal proce ion and ﬁltering) is carried out in the dig ucli provides superior stability and ace in envrronniental conditions and over tim l‘lie ADE7761 incorporates a tault tlete the ADE7751 by continuously monitor neutral currents. A fault is intlicatetl w by more than 6.25%. are r missing neutral condition and 2»phase accuracy overlarge vironmemal conditions and time 0 ppm/"C typical) with emrnal FUN(TIONAL BLOCK DIA mun FAuLY on

Energy Metering IC with On-Chip

Fault and Missing Neutral Detection

ADE7761

Rev. A

Information furnished by Analog Devices is believed to be accurate and reliable.

However, no responsibility is assumed by Analog Devices for its use, nor for any

infringements of patents or other rights of third parties that may result from its use.

Specifications subject to change without notice. No license is granted by implication

or otherwise under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700 www.analog.com

FEATURES

High accuracy active energy measurement IC, supports

IEC 687/61036

Less than 0.1% error over a dynamic range of 500 to 1

Supplies active power on the frequency outputs F1 and F2

High frequency output CF is intended for calibration and

supplies instantaneous active power

Continuous monitoring of the phase and neutral current

allows fault detection in 2-wire distribution systems

Current channels input level best suited for current

transformer sensors

Uses the larger of the two currents (phase or neutral) to

bill—even during a fault condition

Continuous monitoring of the voltage and current inputs

allows missing neutral detection

Uses one current input (phase or neutral) to bill when

missing neutral is detected

Two logic outputs (FAULT and REVP) can be used to indicate

a potential miswiring, fault, or missing neutral condition

Direct drive for electromechanical counters and 2-phase

stepper motors (F1 and F2)

Proprietary ADCs and DSP provide high accuracy over large

variations in environmental conditions and time

Reference 2.5 V ± 8% (drift 30 ppm/°C typical) with external

overdrive capability

Single 5 V supply, low power

GENERAL DESCRIPTION

The ADE7761 is a high accuracy, fault tolerant, electrical energy

measurement IC intended for use with 2-wire distribution

systems. The part specifications surpass the accuracy require-

ments as quoted in the IEC61036 standard.

The only analog circuitry used on the ADE7761 is in the ADCs

and reference circuit. All other signal processing (such as multi-

plication and filtering) is carried out in the digital domain. This

approach provides superior stability and accuracy over extremes

in environmental conditions and over time.

The ADE7761 incorporates a fault detection scheme similar to

the ADE7751 by continuously monitoring both the phase and

neutral currents. A fault is indicated when these currents differ

by more than 6.25%.

(continued on Page 3)

FUNCTIONAL BLOCK DIAGRAM

MISCA

ADC

AGND FAULT V

2.5V

REFERENCE INTERNAL

OSCILLATOR

MISSING NEUTRAL

GAIN ADJUST

MISSING NEUTRAL

DETECTION

914 17 10 11 12

B>A

A<>B

A>B

ZERO CROSSING

DETECTION

ADE7761

SIGNAL PROCESSING

BLOCK

15 18

POWER

SUPPLY MONITOR

DIGITAL-TO-FREQUENCY CONVERTER

16 18 19 20

F1F2CFREVPS0S1SCFDGNDRCLKINREF

IN/OUT

HPF

LPF

4k:

04407-0-001

Figure 1.

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used on the Aused on the A

All other signal procell other signal pr

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des superior stability and accdes superior stability and acc

ental conditions and over timntal conditions and over tim

DE7761 incorporates a fault dE7761 incorporates a

ADE7751 by continuously mADE7751 by continuously

eutral currents. A fault is indeutral currents. A fault is in

by more than 6.25%. y more than 6.25%.

FUNCTIONAFUNCTIO

OBS

MISCAMISCA

ADC

1A1A

AGNDAGN

ﬁring in a Microcon fog‘gy Mea aim“ Magi ‘ n. Negative ine Outline Di oid Gui‘

ADE7761

Rev. A | Page 2 of 28

TABLE OF CONTENTS

General Description......................................................................... 3

Specifications..................................................................................... 4

Timing Characteristics..................................................................... 6

Absolute Maximum Ratings............................................................ 7

ESD Caution.................................................................................. 7

Terminology ...................................................................................... 8

Pin Configuration and Function Descriptions............................. 9

Typical Performance Characteristics ........................................... 11

Operation......................................................................................... 13

Power Supply Monitor............................................................... 13

Analog Inputs.............................................................................. 13

Internal Oscillator ...................................................................... 14

Analog-to-Digital Conversion..................................................14

Active Power Calculation.......................................................... 15

Digital-to-Frequency Conversion............................................ 18

Transfer Function....................................................................... 18

Fault Detection ........................................................................... 19

Missing Neutral Mode............................................................... 20

Applications..................................................................................... 23

Interfacing to a Microcontroller for Energy Measurement.. 23

Selecting a Frequency for an Energy Meter Application....... 23

Negative Power Information..................................................... 24

Outline Dimensions....................................................................... 25

Ordering Guide .......................................................................... 25

Disclaimer........................................................................................ 26

REVISION HISTORY

2/04—Changed from Rev. 0 to Rev. A.

Changes to Ordering Guide .......................................................... 25

1/04—Revision 0: Initial Version

OBSOLETE

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Disclaimer..............................er.............................

...................... 25 ...................... 25

ADE7761

Rev. A | Page 3 of 28

GENERAL DESCRIPTION

(continued from Page 1)

The ADE7761 incorporates a missing neutral detection scheme

by continuously monitoring the input voltage. When a missing

neutral condition is detected—no voltage input—the ADE7761

continues billing based on the active current signal (see the

Missing Neutral Mode section). The missing neutral condition

is indicated when the FAULT pin goes high.

The ADE7761 supplies average active power information on the

low frequency outputs F1 and F2. The CF logic output gives

instantaneous active power information.

The ADE7761 includes a power supply monitoring circuit on

the VDD supply pin. Internal phase matching circuitry ensures

that the voltage and current channels are matched. An internal

no-load threshold ensures that the ADE7761 does not exhibit

any creep when there is no load.

OBSOLETE

Via:Vz»:1100 mV [ms Via:Vz»:1100 mVims rger, typ reading, typ % oi reading,typ Seconds, typ See the Fau‘t Detection section (Via or Vra active) (VrA or Vra active) Overa dynamic range ofSOO to 1 Overa dynamic range 0650 Seconds, typ See the Missing 59.4 mv peak. min 0.1 % of re typ Over AGND 0.1 of reading, typ Over Detection Delay 3 Seconds, typ via , :550 mV peak, ma 560 mV peak ma e (DC) 400 kn, min dB) 7 kH r1 10 m :4 % InpmVollage Range impedance

ADE7761

Rev. A | Page 4 of 28

SPECIFICATIONS

VDD = 5 V ± 5%, AGND = DGND = 0 V, on-chip reference, on-chip oscillator, TMIN to TMAX = –40°C to +85°C.

Table 1.

Parameter Value Unit Test Conditions/Comments

ACCURACY1

Measurement Error2 0.1 % of reading, typ Over a dynamic range of 500 to 1

Phase Error between Channels

(PF = 0.8 Capacitive) ±0.05 Degrees, max Phase lead 37°

(PF = 0.5 Inductive) ±0.05 Degrees, max Phase lag 60°

AC Power Supply Rejection2

Output Frequency Variation 0.01 %, typ V1A = V1B = V2P = ±100 mV rms

DC Power Supply Rejection2

Output Frequency Variation 0.01 %, typ V1A = V1B = V2P = ±100 mV rms

FAULT DETECTION2, 3 See the Fault Detection section

Fault Detection Threshold

Inactive Input <> Active Input 6.25 %, typ (V1A or V1B active)

Input Swap Threshold

Inactive Input <> Active Input 6.25 % of larger, typ (V1A or V1B active)

Accuracy Fault Mode Operation

V1A Active, V1B = AGND 0.1 % of reading, typ Over a dynamic range of 500 to 1

V1B Active, V1A = AGND 0.1 % of reading, typ Over a dynamic range of 500 to 1

Fault Detection Delay 3 Seconds, typ

Swap Delay 3 Seconds, typ

MISSING NEUTRAL MODE2, 4 See the Missing Neutral Detection section

Missing Neutral Detection Threshold

V2P − V2N 59.4 mV peak, min

Accuracy Missing Neutral Mode

V1A Active, V1B = V2P = AGND 0.1 % of reading, typ Over a dynamic range of 500 to 1

V1B Active, V1A = V2P = AGND 0.1 % of reading, typ Over a dynamic range of 500 to 1

Missing Neutral Detection Delay 3 Seconds, typ

ANALOG INPUTS V1A − V1N, V1B − V1N, V2P − V2N

Maximum Signal Levels ±660 mV peak, max Differential input

660 mV peak, max Differential input MISCAL − V2N

Input Impedance (DC) 400 kΩ, min

Bandwidth (−3 dB) 7 kHz, typ

ADC Offset Error2 10 mV, max Uncalibrated error, see the Terminology section for details

Gain Error ±4 %, typ External 2.5 V reference

REFERENCE INPUT

REFIN/OUT Input Voltage Range 2.7 V, max 2.5 V + 8%

2.3 V, min 2.5 V − 8%

Input Impedance 4 kΩ, min

Input Capacitance 10 pF, max

ON-CHIP REFERENCE

Reference Error ±200 mV, max

Temperature Coefficient 30 ppm/°C, typ

Current Source 20 µA, min

ON-CHIP OSCILLATOR

Oscillator Frequency 450 kHz

Oscillator Frequency Tolerance ±12 % of reading, typ

Temperature Coefficient 30 ppm/°C, typ

See footnotes on next page.

OBSOLETE

mV rms mV rms

±100 mV rms ±100 mV rms

Detection section Detection section

1B1B

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660 m660

400 400

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ge Range ge Range

5% 5% w:5V:5°/u,‘snwz 10mA W:5V:5°/n,l,m— UmA For spedlied performance 5 v , 5% 5 v + 5% nctmnzMy ammn of mlSSmg neutral detection (unmanamy. an m prunes; (hangethn may mm mi; parametev.

ADE7761

Rev. A | Page 5 of 28

Parameter Value Unit Test Conditions/Comments

LOGIC INPUTS5

SCF, S1, and S0

Input High Voltage, VINH 2.4 V, min VDD = 5 V ± 5%

Input Low Voltage, VINL 0.8 V, max VDD = 5 V ± 5%

Input Current, IIN ±3 µA, max Typical 10 nA, VIN = 0 V to VDD

Input Capacitance, CIN 10 pF, max

LOGIC OUTPUTS5

CF, REVP, and FAULT

Output High Voltage, VOH 4 V, min VDD = 5 V ± 5%

Output Low Voltage, VOH 1 V, max VDD = 5 V ± 5%

F1 and F2

Output High Voltage, VOH 4 V, min VDD = 5 V ± 5%, ISOURCE = 10 mA

Output Low Voltage, VOH 1 V, max VDD = 5 V ± 5%, ISINK = 10 mA

POWER SUPPLY For specified performance

VDD 4.75 V, min 5 V − 5%

5.25 V, max 5 V + 5%

VDD 4 mA, max

1 See plots in the Typical Performance Characteristics section.

2 See the Terminology section for explanation of specifications.

3 See the Fault Detection section for explanation of fault detection functionality.

4 See the Missing Neutral Detection section for explanation of missing neutral detection functionality.

5 Sample tested during initial release and after any redesign or process change that may affect this parameter.

OBSOLETE

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Funmon sectwon Fa‘ling Edge. Transler Funmon Sectlon. and F2 Pulse. Tvansfev Funmon semen. Figure 2. Tuning Diagram for Frequenty Output;

ADE7761

Rev. A | Page 6 of 28

TIMING CHARACTERISTICS

VDD = 5 V ± 5%, AGND = DGND = 0 V, on-chip reference, on-chip oscillator, TMIN to TMAX = –40°C to +85°C.

Sample tested during initial release and after any redesign or process change that may affect this parameter.

See Figure 2.

Table 2.

Parameter Value Unit Test Conditions/Comments

t11 120 ms F1 and F2 Pulse Width (Logic High).

t2 See Table 6 s Output Pulse Period. See the Transfer Function section.

t3 1/2 t2 s Time between F1 Falling Edge and F2 Falling Edge.

t41 90 ms CF Pulse Width (Logic High).

t5 See Table 7 s CF Pulse Period. See the Transfer Function section.

t6 CLKIN/4 s Minimum Time between F1 and F2 Pulse.

1 The pulse widths of F1, F2, and CF are not fixed for higher output frequencies. See the Transfer Function section.

04407-0-002

Figure 2. Timing Diagram for Frequency Outputs

OBSOLETE

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2. Timing Diagram for Frequencyming Diagram for Freq

cundniuns for extended pm sensitive device. Eiectrostatic charges as high as 4000 v readily equipment and (an discharge without detection. Aithough this pr WARNING! Q itry, permanent damage may occur on devices su W“ discharges.Therefore, proper ESD precautions are recommended to “WWW.” functionality.

ADE7761

Rev. A | Page 7 of 28

ABSOLUTE MAXIMUM RATINGS

TA = 25°C, unless otherwise noted.

Table 3.

Parameter Rating

VDD to AGND −0.3 V to +7 V

Analog Input Voltage to AGND

V1AP, V1BP, V1N, V2N, V2P, MISCAL

−6 V to +6 V

Reference Input Voltage to AGND −0.3 V to VDD + 0.3 V

Digital Input Voltage to DGND −0.3 V to VDD + 0.3 V

Digital Output Voltage to DGND −0.3 V to VDD + 0.3 V

Operating Temperature Range

Industrial −40°C to +85°C

Storage Temperature Range −65°C to +150°C

Junction Temperature 150°C

20-Lead SSOP, Power Dissipation 450 mW

θJA Thermal Impedance 112°C/W

Lead Temperature, Soldering

Vapor Phase (60 s) 215°C

Infrared (15 s) 220°C

Stresses above those listed under Absolute Maximum Ratings

may cause permanent damage to the device. This is a stress

rating only; functional operation of the device at these or any

other conditions above those listed in the operational sections

of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect

device reliability.

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on

the human body and test equipment and can discharge without detection. Although this product features

proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy

electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance

degradation or loss of functionality.

OBSOLETE

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ge analug inp he input rang acteristics section). H he offset is removed from ower calculation is not aflected ain Error The gain error in the ADE7761 ADCs iv ence between the measured output fv and the ideal output frequency. Th ereentage of the ideal frequency the ADE7761 measurement error as a percent “3’1““ mm” (“a ““3 “am“ he power supplies are varied. For the ae reading at nominal supplies (5 v) is taken, obtained with the same input signal levels rms/ioo Hz) signal rs introduced onto the introduced by this ae signal is expressed as a admg (see the Measurement Error deﬁnition

ADE7761

Rev. A | Page 8 of 28

TERMINOLOGY

Measurement Error

The error associated with the energy measurement made by the

ADE7761 is defined by the following formula:

§u



%100

7761

EnergyTrue

EnergyTrueADEbyregisteredEnergy

Erro

Percentag

Phase Error between Channels

The high-pass filter (HPF) in the current channel has a phase

lead response. To offset this phase response and equalize the

phase response between channels, a phase correction network is

also placed in the current channel. The phase correction net-

work ensures a phase match between the current channels and

voltage channels to within ±0.1° over a range of 45 Hz to 65 Hz

and ±0.2° over a range 40 Hz to 1 kHz.

Power Supply Rejection

This quantifies the ADE7761 measurement error as a percent-

age of reading when the power supplies are varied. For the ac

PSR measurement, a reading at nominal supplies (5 V) is taken.

A second reading is obtained with the same input signal levels

when an ac (175 mV rms/100 Hz) signal is introduced onto the

supplies. Any error introduced by this ac signal is expressed as a

percentage of reading (see the Measurement Error definition

above).

For the dc PSR measurement, a reading at nominal supplies

(5 V) is taken. A second reading is obtained with the same input

signal levels when the power supplies are varied ±5%. Any error

introduced is again expressed as a percentage of reading.

ADC Offset Error

This refers to the dc offset associated with the analog inputs to

the ADCs. It means that with the analog inputs connected to

AGND, the ADCs still see a dc analog input signal. The magni-

tude of the offset depends on the input range selection (see the

Typical Performance Characteristics section). However, when

HPFs are switched on, the offset is removed from the current

channels and the power calculation is not affected by this offset.

Gain Error

The gain error in the ADE7761 ADCs is defined as the differ-

ence between the measured output frequency (minus the offset)

and the ideal output frequency. The difference is expressed as a

percentage of the ideal frequency, which is obtained from the

transfer function (see the Transfer Function section).

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VII—lﬂrlrll—H—H—lﬂﬂ LILIUULILILIUUU SOP) MISCAL supply voltage for the digital c cuitry in th maintained at 5 v 1 5% fo speciﬁed operation.This pin shou parallel with a (eramlc 100 nF capacitor. I i (Currentchannell These input are fully differenli input signal levels of :550 mV with respect to v for spe these plnS is :1 v with respect to AGND. Be an overvoltage of :5 v can also be sustaine for Differential Voltage InputSVin and v .The ma to AGND.The input has internal ESD p ained on these inputs without risk of per the burden resistor and held at a ﬁxed pot Negative lnput Pin for Differential v :1 v with respect to AGND.Th(= (an also be sustained on the' ﬁxed potential,that is AGN Analog inputs for Chann maximum differentia maximum signal leve circuitry, and an ove damage. Analog input for Mis in the missing neutra input signal levels of this pin i511 Vvvith r

ADE7761

Rev. A | Page 9 of 28

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

ADE7761

TOP VIEW

(Not to Scale)

REF

IN/OUT 9

SCF

DD 1

1A 2

1B 3

1N 4

DGND

2N 5

REVP

2P 6

FAULT

MISCAL

RCLKIN

AGND

INT

04407-0-003

Figure 3. Pin Configuration (SSOP)

Table 4. Pin Function Descriptions

Pin No. Mnemonic Description

1 VDD Power Supply. This pin provides the supply voltage for the digital circuitry in the ADE7761. The supply

voltage should be maintained at 5 V ± 5% for specified operation. This pin should be decoupled with a

10 µF capacitor in parallel with a ceramic 100 nF capacitor.

2, 3 V1A, V1B Analog Inputs for Channel 1 (Current Channel). These inputs are fully differential voltage inputs with

maximum differential input signal levels of ±660 mV with respect to V1N for specified operation. The

maximum signal level at these pins is ±1 V with respect to AGND. Both inputs have internal ESD

protection circuitry, and an overvoltage of ±6 V can also be sustained on these inputs without risk of

permanent damage.

4 V1N Negative Input Pin for Differential Voltage Inputs V1A and V1B. The maximum signal level at this pin is

±1 V with respect to AGND. The input has internal ESD protection circuitry, and an overvoltage of ±6 V

can also be sustained on these inputs without risk of permanent damage. The input should be directly

connected to the burden resistor and held at a fixed potential,that is, AGND. See the Analog Inputs

section.

5 V2N Negative Input Pin for Differential Voltage Inputs V2P and MISCAL. The maximum signal level at this pin is

±1 V with respect to AGND. The input has internal ESD protection circuitry, and an overvoltage of ±6 V

can also be sustained on these inputs without risk of permanent damage. The input should be held at a

fixed potential, that is, AGND. See the Analog Inputs section.

6 V2P Analog Inputs for Channel 2 (Voltage Channel). This input is fully differential voltage input with

maximum differential input signal levels of ±660 mV with respect to V2N for specified operation. The

maximum signal level at these pins is ±1 V with respect to AGND. This input has internal ESD protection

circuitry, and an overvoltage of ±6 V can also be sustained on these inputs without risk of permanent

damage.

7 MISCAL

Analog Input for Missing Neutral Calibration. This pin can be used to calibrate the CF-F1-F2 frequencies

in the missing neutral condition. This input is fully differential voltage input with maximum differential

input signal levels of +660 mV with respect to V2N for specified operation. The maximum signal level at

this pin is ±1 V with respect to AGND. This input has internal ESD protection circuitry, and an

overvoltage of ±6 V can also be sustained on these inputs without risk of permanent damage.

8 AGND

This pin provides the ground reference for the analog circuitry in the ADE7761, that is, ADCs and

reference. This pin should be tied to the analog ground plane of the PCB. The analog ground plane is the

ground reference for all analog circuitry such as antialiasing filters, and current and voltage transducers.

For good noise suppression, the analog ground plane should be connected only to the digital ground

plane at the DGND pin.

9 REFIN/OUT This pin provides access to the on-chip voltage reference. The on-chip reference has a nominal value of

2.5 V ± 8% and a typical temperature coefficient of 30 ppm/°C. An external reference source can also be

connected at this pin. In either case, this pin should be decoupled to AGND with a 1 F ceramic

capacitor and 100 nF ceramic capacitor.

10 SCF Select Calibration Frequency. This logic input is used to select the frequency on the calibration output

CF. Table 6 shows how the calibration frequencies are selected.

11, 12 S1, S0 These logic inputs are used to select one of four possible frequencies for the digital-to-frequency

conversion. This offers the designer greater flexibility when designing the energy meter. See the

Selecting a Frequency for an Energy Meter Application section.

OBSOLETE

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ADE7761

Rev. A | Page 10 of 28

Pin No. Mnemonic Description

13 INT This pin is internally used and should be connected to DGND.

14 RCLKIN

To enable the internal oscillator as a clock source on the chip, a precise low temperature drift resistor at

nominal value of 6.2 kΩ must be connected from this pin to DGND.

15 FAULT

This logic output goes active high when a fault or missing neutral condition occurs. A fault is defined as

a condition under which the signals on V1A and V1B differ by more than 6.25%. A missing neutral

condition is defined when the chip is powered up with no voltage at the input. The logic output is reset

to zero when a fault or missing neutral condition is no longer detected. See the Fault Detection section

and the Missing Neutral Mode section.

16 REVP This logic output goes logic high when negative power is detected, that is, when the phase angle

between the voltage and current signals is greater than 90°. This output is not latched and is reset when

positive power is once again detected. The output goes high or low at the same time as a pulse is issued

on CF.

17 DGND

This pin provides the ground reference for the digital circuitry in the ADE7761, that is, multiplier, filters,

and digital-to-frequency converter. This pin should be tied to the digital ground plane of the PCB. The

digital ground plane is the ground reference for all digital circuitry such as counters (mechanical and

digital), MCUs, and indicator LEDs. For good noise suppression, the analog ground plane should be

connected only to the digital ground plane at the DGND pin.

18 CF Calibration Frequency Logic Output. The CF logic output, active high, gives instantaneous active power

information. This output is intended to be used for operational and calibration purposes. See the Digital-

to-Frequency Conversion section.

19, 20 F2, F1 Low Frequency Logic Outputs. F1 and F2 supply average active power information. The logic outputs

can be used to directly drive electromechanical counters and 2-phase stepper motors.

OBSOLETE

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ADE7761

Rev. A | Page 11 of 28

TYPICAL PERFORMANCE CHARACTERISTICS

04407-0-037

CURRENT (% of Full Scale)

100.00.1 1.0 10.0

% ERROR

–1.0

1.0

0.8

0.6

0.4

0.2

–0.2

–0.4

–0.6

–0.8

PF = 1

ON-CHIP REFERENCE –40°C

+25°C

+85°C

Figure 4. Active Power Error as a Percentage of Reading with

Internal Reference

04407-0-038

CURRENT (% of Full Scale)

100.00.1 1.0 10.0

% ERROR

–1.0

1.5

1.0

0.5

–0.5

PF = 0.5

ON-CHIP REFERENCE

–40°C; PF = 0.5

+25°C; PF = 1

+25°C; PF = 0.5

+85°C; PF = 0.5

Figure 5. Active Power Error as a Percentage of Reading over

Power Factor with Internal Reference

04434-0-039

CURRENT (% of Full Scale)

100.00.1 1.0 10.0

% ERROR

–1.0

1.0

0.8

0.6

0.4

0.2

–0.2

–0.4

–0.6

–0.8

PF = 1

ON-CHIP REFERENCE

5.25V

5.00V

4.75V

Figure 6. Active Power Error as a Percentage of Reading

over Power Supply with Internal Reference

04434-0-040

CURRENT (% of Full Scale)

100.00.1 1.0 10.0

% ERROR

–2.0

2.0

1.5

1.0

0.5

–0.5

–1.0

–1.5

ON-CHIP REFERENCE

+85°C

+25°C

–40°C

Figure 7. Ampere Hour Error as a Percentage of Reading in

Missing Neutral Mode with Internal Reference

OBSOLET

04407-0-038

Full Scale)

100.0100.0

10.00

as a Percentage of Reading over s a Percentage of Reading over

with Internal Reference with Internal Referenc

CURRENT (% of Full ScaCURRENT (% of Full Sca

1.0

10.010.0

Figure 6. Active Power Error as a PFigure 6. Active Power Error as a P

over Power Supply with wer Supply

% ERROR% ERR

2.02.0

1.51.5

1.00

0.5

–0–0

LET

CHIP R

LET

Figure 8, TeerrmrriorPerfon-nances Curves

ADE7761

Rev. A | Page 12 of 28

REF

IN/OUT

100nF

10PF

AGND DGNDINT

FAULT

RCLKIN

SCF

PS2501-1

ADE7761

TO FREQ.

COUNTER

100nF 10PF

33nF

1k:S0

6.2k:

10k:

40A TO 80mA

RB = 18:

1713 8

2k:

MISCAL

33nF1k:

1M:

220V

100k:

560k:

33nF

1k:

RB 33nF

1k:

RB 33nF

1k:

04407-0-036

Figure 8. Test Circuit for Performances Curves

OBSOLETE

100nF100nF

ETE

r Performances Curves Performances Curves

l_l Supply Monitoring (Current Channel) mm the current transducers are connected Channel Vi has two voltage inputs, V” are fully (hfterenﬁal with respect to VN. me, only one is selected to perform lhe lhe Fault Detection section), ak differential signal on VirVix and s the maximum signal levels on vn, vis voltage signal on t' (usually AG swarm, ﬁSWV MAX . ch council none :3 - ‘ VEM xloamv MAX ' Figure l i. Maximum Signal Le The differential voltage Vrerm must in common mode (usually AGND). The a ADE7761 can be driven w 100 mV with respect lo AG achieved using a common MISCAL Input The input for the power ca connected to the singleeended vol derived from the

ADE7761

Rev. A | Page 13 of 28

OPERATION

POWER SUPPLY MONITOR

The ADE7761 contains an on-chip power supply monitor. The

power supply (VDD) is continuously monitored by the ADE7761.

If the supply is less than 4 V ± 5%, the ADE7761 goes into an

inactive state, that is, no energy is accumulated and the CF, F1,

and F2 outputs are disabled. This is useful to ensure correct

device operation at power-up and during power-down. The

power supply monitor has built-in hysteresis and filtering. This

gives a high degree of immunity to false triggering due to noisy

supplies.

The power supply and decoupling for the part should be such

that the ripple at VDD does not exceed 5 V ± 5% as specified for

normal operation.

ADE7761

REVP - FAULT - CF

F1 - F2 OUTPUTS INACTIVE ACTIVE

TIME

INACTIVE

04407-0-010

Figure 9. On-Chip Power Supply Monitoring

ANALOG INPUTS

Channel V1 (Current Channel)

The voltage outputs from the current transducers are connected

to the ADE7761 here. Channel V1 has two voltage inputs, V1A

and V1B. These inputs are fully differential with respect to V1N.

However, at any one time, only one is selected to perform the

power calculation (see the Fault Detection section).

The maximum peak differential signal on V1A–V1N and V1B–V1N

is ±660 mV.

Figure 10 shows the maximum signal levels on V1A, V1B, and V1N.

The differential voltage signal on the inputs must be referenced

to a common mode (usually AGND).

+660mV + V

–660mV + V

DIFFERENTIAL INPUT B

±660mV MAX PEAK V

COMMON MODE

±100mV MAX

DIFFERENTIAL INPUT A

±660mV MAX PEAK

AGND

, V

04407-0-011

Figure 10. Maximum Signal Levels, Channel 1

Channel V2 (Voltage Channel)

The output of the line voltage transducer is connected to the

ADE7761 at this analog input. Channel V2 is a single-ended

voltage input. The maximum peak differential signal on

Channel 2 is ±660 mV with respect to V2N. Figure 11 shows the

maximum signal levels that can be connected to Channel 2.

04407-0-012

+660mV + V

–

660mV + V

COMMON MODE

±100mV MAX

DIFFERENTIAL INPUT

±660mV MAX PEAK

Figure 11. Maximum Signal Levels, Channel 2

The differential voltage V2P–V2N must be referenced to a

common mode (usually AGND). The analog inputs of the

ADE7761 can be driven with common-mode voltages of up to

100 mV with respect to AGND. However, the best results are

achieved using a common mode equal to AGND.

MISCAL Input

The input for the power calibration in missing neutral mode is

connected to the ADE7761 at this analog input. MISCAL is a

single-ended voltage input. It is recommended to use a dc signal

derived from the voltage reference to drive this pin. The maxi-

mum peak differential signal on MISCAL is +660 mV with

respect to V2N. Figure 12 shows the maximum signal levels that

can be connected to the MISCAL pin.

04407-0-013

+660mV + V

COMMON MODE

±100mV MAX

MISCAL

DIFFERENTIAL INPUT

±660mV MAX PEAK

MISCAL

AGND

Figure 12. Maximum Signal Levels, MISCAL

The differential voltage MISCAL–V2N must be referenced to a

common mode (usually AGND). The analog inputs of the

ADE7761 can be driven with common-mode voltages of up to

100 mV with respect to AGND. However, best results are

achieved using a common mode equal to AGND.

Typical Connection Diagrams

Figure 13 shows a typical connection diagram for Channel V1.

The analog inputs are being used to monitor both the phase

and neutral currents. Because of the large potential difference

between the phase and neutral, two current transformers (CTs)

must be used to provide the isolation. Note that both CTs are

referenced to analog ground (AGND); the common-mode

OBSOLET

04407-0-0104407-0-

t transducers are connected nsducers are conne

has two voltage inputs, Vhas two voltage inputs, V

differential with respect to Vdifferential with respect to V

only one is selected to performnly one is selected to perfor

he Fault Detection section). ault Detection sectio

ak differential signal on Vak differential signal on V

1A1A

ws the maximum signal l

the maximum sign

oltage signal on tholtage signal on t

(usually AG

ETE

COMMON MODECOMMON MODE

±100mV MAX±100mV MAX

FERENTIAERENT

±660mV MAX P660mV

Figure 11. Maximum SignalFigure 11. Maxim

e differential voltage Vdifferential voltage V

2P2P

–V–V

common mode (usually AGNommon mode (usually AGN

ADE7761 can be driven wDE7761 can be driven

100 mV with respect tmV with respect t

achieved using a cousing a co

MISCAL InputL Inpu

The input fThe input

connectconnec

sing

mus NEu'mAL F1, and F2 are alor trequency; there tolerance and low temperatn limits the variation of the intern variation of the clock trequen output frequencies from me lbulcs la 2 smaller calibration ran erature dritt resistor directly li nternal clock frequency over tev meter to external variation is ADE776|

ADE7761

Rev. A | Page 14 of 28

voltage, therefore, is 0 V. The CT turns ratio and burden resistor

(RB) are selected to give a peak differential voltage of ±660 mV.

Figure 14 shows two typical connections for Channel V2. The

first option uses a potential transformer (PT) to provide

complete isolation from the main voltage. In the second option,

the ADE7761 is biased around the neutral wire, and a resistor

divider is used to provide a voltage signal that is proportional to

the line voltage. Adjusting the ratio of RA and RB + VR is a

convenient way of carrying out a gain calibration on the meter.

Figure 15 shows a typical connection for MISCAL input. The

voltage reference input (REFIN/OUT) is used as a dc reference to

set the MISCAL voltage. Adjusting the level of MISCAL to

calibrate the meter in missing neutral mode can be done by

changing the ratio of RC and RD + VR1. When the internal

reference is used, the values of RC, RD, and VR1 must be chosen

to limit the current sourced by the internal reference sourcing

current to below the specified 20 μA. Therefore, because VREF

internal = 2.5 V, RC + RD + VR1 > 600 kΩ.

AGND

INIP

PHASE

NEUTRAL

04407-0-014

Figure 13. Typical Connection for Channel 1

04407-0-015

*RB + VR = RF

VR*

RB*

RA*

NEUTRAL

PHASE

NEUTRAL

PHASE

±660mV

AGND

Figure 14. Typical Connection for Channel 2

04407-0-016

VR1

MISCAL

REF

IN/OUT

Figure 15. Typical Connection for MISCAL

INTERNAL OSCILLATOR

The nominal internal oscillator frequency is 450 kHz when

used with the recommended ROSC resistor value of 6.2 kΩ

between RCLKIN and DGND (see Figure 16).

The internal oscillator frequency is inversely proportional to the

value of this resistor. Although the internal oscillator operates

when used with a ROSC resistor value between 5 kΩ and 12 kΩ, it

is recommended to choose a value within the range of the

nominal value.

The output frequencies on CF, F1, and F2 are directly propor-

tional to the internal oscillator frequency; therefore, the resistor

ROSC must have a low tolerance and low temperature drift. A low

tolerance resistor limits the variation of the internal oscillator

frequency. Small variation of the clock frequency and conse-

quently of the output frequencies from meter to meter

contributes to a smaller calibration range of the meter. A low

temperature drift resistor directly limits the variation of the

internal clock frequency over temperature. The stability of the

meter to external variation is then better ensured by design.

2.5V

REFERENCE INTERNAL

OSCILLATOR

ADE7761

DGNDRCLKINREF

IN/OUT

04407-0-017

OSC

14 17

Figure 16. Internal Oscillator Connection

ANALOG-TO-DIGITAL CONVERSION

The analog-to-digital conversion in the ADE7761 is carried out

using second-order Σ-Δ ADCs. Figure 17 shows a first-order

(for simplicity) Σ-Δ ADC. The converter is made up of two

parts: the Σ-Δ modulator and the digital low-pass filter.

04407-0-019

....10100101....

1-BIT DAC

LATCHED

COMPAR-

ATOR

INTEGRATOR

REF

MCLK

ANALOG

LOW-PASS FILTER DIGITAL

LOW-PASS FILTER

124

Figure 17. First-Order Σ-Δ ADC

A Σ-Δ modulator converts the input signal into a continuous

serial stream of 1s and 0s at a rate determined by the sampling

clock. In the ADE7761, the sampling clock is equal to CLKIN.

The 1-bit DAC in the feedback loop is driven by the serial data

stream. The DAC output is subtracted from the input signal. If

the loop gain is high enough, the average value of the DAC

OBSOLE

04407-0-01404407-0-014

nel 1 nel 1

VR*

2N2N

OLETE

F1, and F2 arF1, and F2 a

tor frequency; theretor frequency; th

erance and low temperatu

ts the variation of the internts the variation of the intern

variation of the clock frequenariation of the clock frequen

output frequencies from metoutput frequencies from me

to a smaller calibration rangto a smaller calibration

ture drift resistor directly limture drift resistor directly li

nal clock frequency over temal clock frequen

meter to external variation is to external variation i

OLE

2.5V5V

REFERENCEREFERENCE

ADE77617761

+H+w rcrent enough method he band of inter required just to the oversampling e the quantization noise lies at the higher trequcn. XcA modulator; the noise is has a highrpnss type response he result is that most of the noise is nois queneies where it can he removed by the digital anth FIL'IER noise shaping is also shown in Figure la, NTIALIAS H ER (Rn) smmue FREQUENCY smpan Mots: 7 1m: men RESOLUIION ompm rnou DIGIYAL LFP ‘/ 225m: 45an FREQUENCY mu quency components (arrows amplmg frequency (also know is, 225 kH’A are imaged or to 225 kHz (arrows shown in grayJ.This no matter what the architecture. In the quencies near the sampling frequency band of interest for metering (40 Hz lows the use ota very simple lowpass trequencies (near 250 kHz) and thereby the band of interest. A simple RC ﬁl corner frequency of 10 kHz produces a approximately 33 dB at 450 kHz (see F sufﬁcient to eliminate the effects of ali AerALlAslrt

ADE7761

Rev. A | Page 15 of 28

output (and, therefore, the bit stream) approaches that of the

input signal level. For any given input value in a single sampling

interval, the data from the 1-bit ADC is virtually meaningless.

Only when a large number of samples are averaged is a

meaningful result obtained. This averaging is carried out in the

second part of the ADC, the digital low-pass filter. By averaging

a large number of bits from the modulator, the low-pass filter

can produce 24-bit data words that are proportional to the input

signal level.

The Σ-Δ converter uses two techniques to achieve high

resolution from what is essentially a 1-bit conversion technique.

The first is oversampling, which means that the signal is

sampled at a rate (frequency) that is many times higher than the

bandwidth of interest. For example, the sampling rate in the

ADE7761 is CLKIN (450 kHz) and the band of interest is 40 Hz

to 1 kHz. Oversampling has the effect of spreading the

quantization noise (noise due to sampling) over a wider

bandwidth. With the noise spread more thinly over a wider

bandwidth, the quantization noise in the band of interest is

lowered (see Figure 18).

However, oversampling alone is not an efficient enough method

to improve the signal-to-noise ratio (SNR) in the band of inter-

est. For example, an oversampling ratio of 4 is required just to

increase the SNR by only 6 dB (1 bit). To keep the oversampling

ratio at a reasonable level, it is possible to shape the quantization

noise so that the majority of the noise lies at the higher frequen-

cies. This is what happens in the Σ-Δ modulator; the noise is

shaped by the integrator, which has a high-pass type response

for the quantization noise. The result is that most of the noise is

at the higher frequencies where it can be removed by the digital

low-pass filter. This noise shaping is also shown in Figure 18.

SHAPED NOISE

HIGH RESOLUTION

OUTPUT FROM

DIGITAL LFP

NOISE

IGNAL

NOISE

IGNAL

0 1kHz 225kHz 450kHz

FREQUENCY (Hz)

0 1kHz 225kHz 450kHz

FREQUENCY (Hz)

DIGITAL FILTER

ANTIALIAS FILTER (RC

)

SAMPLING FREQUENCY

04407-0-020

Figure 18. Noise Reduction Due to Oversampling and

Noise Shaping in the Analog Modulator

Antialias Filter

Figure 18 also shows an analog low-pass filter (RC) on input to

the modulator. This filter is present to prevent aliasing. Aliasing

is an artifact of all sampled systems, which means that fre-

quency components in the input signal to the ADC that are

higher than half the sampling rate of the ADC appear in the

sampled signal frequency below half the sampling rate.

Figure 19 illustrates the effect.

In Figure 19, frequency components (arrows shown in black)

above half the sampling frequency (also known as the Nyquist

frequency), that is, 225 kHz, are imaged or folded back down

below 225 kHz (arrows shown in gray). This happens with all

ADCs no matter what the architecture. In the example shown,

only frequencies near the sampling frequency (450 kHz) move

into the band of interest for metering (40 Hz to 1 kHz). This

fact allows the use of a very simple low-pass filter to attenuate

these frequencies (near 250 kHz) and thereby prevent distortion

in the band of interest. A simple RC filter (single pole) with a

corner frequency of 10 kHz produces an attenuation of

approximately 33 dB at 450 kHz (see Figure 19). This is

sufficient to eliminate the effects of aliasing.

04407-0-021

0 1kHz 225kHz 450kHz

FREQUENCY (Hz)

IMAGE

FREQUENCIES

SAMPLING

FREQUENCY

ANTIALIASING EFFECTS

Figure 19. ADC and Signal Processing in Current Channel or Voltage Channel

ACTIVE POWER CALCULATION

The ADCs digitize the voltage signals from the current and

voltage transducers. A high-pass filter in the current channel

removes any dc component from the current signal. This

eliminates any inaccuracies in the active power calculation due

to offsets in the voltage or current signals (see the HPF and

Offset Effects section).

The active power calculation is derived from the instantaneous

power signal. The instantaneous power signal is generated by a

direct multiplication of the current and voltage signals. To

extract the active power component (dc component), the

instantaneous power signal is low-pass filtered. Figure 20

illustrates the instantaneous active power signal and shows how

the active power information can be extracted by low-pass

filtering the instantaneous power signal. This scheme correctly

calculates active power for nonsinusoidal current and voltage

waveforms at all power factors. All signal processing is carried

out in the digital domain for superior stability over temperature

and time.

OBSOLET

ampling ampling

uantization antization

igher frequen-r fre

or; the noise is noise i

pass type response pass type response

that most of the noise is at most of the noise is

n be removed by the digital removed by the dig

g is also shown in Figure 18. is also shown in Figure 18

SHAPED NOISESHAPED NOI

SOLUTIONSOLUTION

FROM

kHz

225kHzz

FREQUENCY (UENCY

S FILTER (RCFILTER (RC

))

SAMPLING FREQUENCYMPLING FREQ

LETE

nen

uency (auency

Hz, are imaged Hz, are imaged

ws shown in gray). Thishown in gray)

hat the architecture. In the

s near the sampling frequencs near the sampling frequen

d of interest for metering (40d of interest for metering (40

ws the use of a very simple lows the use of a very simple lo

frequencies (near 250 kHz) afrequencies (near 250 kH

the band of interest. A simplthe band of interest. A simpl

corner frequency of 10 kHzorner frequency of 1

approximately 33 dB at 4roximately 33 dB at

sufficient to eliminateent to eliminat

ark Diagram ower information from lowepase filtering) is still rem signals are not in power factor condition and DPF : 0.5), that is, current signal one assumes that the voltage and sinusoidal, the active power component ower signal (dc term) is given ms(60°) ive power calcuiat rmunzous msrAmAMEous owzn SIGNAL new: POWER 5 Figure 21.Acuve Power Cnlﬂllauoli Nonsinusoidal Voltage and Current The active power calcula nonsimlsoidal current current waveform in harmonic content. Us voltage and current w their harmonic come wit): f where:

ADE7761

Rev. A | Page 16 of 28

The low frequency output of the ADE7761 is generated by

accumulating this active power information. This low frequency

inherently means a long accumulation time between output

pulses. The output frequency is, therefore, proportional to the

average active power. This average active power information can

in turn be accumulated (for example, by a counter) to generate

active energy information. Because of its high output frequency

and therefore shorter integration time, the CF output is propor-

tional to the instantaneous active power. This is useful for

system calibration purposes that would take place under steady

load conditions.

04407-0-022

DIGITAL-TO-

FREQUENCY

DIGITAL-TO-

FREQUENCY

HPF

MULTIPLIER LPF

ADC

CH1

CH2

INSTANTANEOUS

POWER SIGNAL –p(t) INSTANTANEOUS

ACTIVE POWER SIGNAL

V× I

TIME

p(t) = i(t).v(t)

WHERE:

v(t) = V × cos(Yt)

i(t) = I × cos(Yt)

p(t) = V× I

{1 + cos (2Yt)}

Figure 20. Signal Processing Block Diagram

Power Factor Considerations

The method used to extract the active power information from

the instantaneous power signal (by low-pass filtering) is still

valid even when the voltage and current signals are not in

phase. Figure 21 displays the unity power factor condition and

a displacement power factor (DPF = 0.5), that is, current signal

lagging the voltage by 60°. If one assumes that the voltage and

current waveforms are sinusoidal, the active power component

of the instantaneous power signal (dc term) is given by

(V × I/2) × cos(60°)

This is the correct active power calculation.

INSTANTANEOUS

POWER SIGNAL INSTANTANEOUS

ACTIVE POWER SIGNAL

INSTANTANEOUS

POWER SIGNAL INSTANTANEOUS

ACTIVE POWER SIGNAL

60°

CURRENT

VOLTAGE

04407-0-023

V× I

2× cos(60°)

Figure 21. Active Power Calculation over PF

Nonsinusoidal Voltage and Current

The active power calculation method also holds true for

nonsinusoidal current and voltage waveforms. All voltage and

current waveforms in practical applications have some

harmonic content. Using the Fourier transform, instantaneous

voltage and current waveforms can be expressed in terms of

their harmonic content:

)sin(2)(

OthVVtv DZuu ¦

(1)

where:

v(t) is the instantaneous voltage.

VO is the average value.

Vh is the rms value of voltage harmonic h.

αh is the phase angle of the voltage harmonic.

)sin(2)(

OthIIti EZuu ¦

(2)

where:

i(t) is the instantaneous current.

IO is the dc component.

Ih is the rms value of current harmonic h.

βh is the phase angle of the current harmonic.

OBSOLE

044044

information from nformation from

ss filtering) is still ltering) is still

t signals are not in signals are not in

power factor condition and ower factor condition and

F = 0.5), that is, current signF = 0.5), that is, current sign

one assumes that the voltage e assumes that the vol

usoidal, the active power comsoidal, the active power co

ower signal (dc term) is givenower signal (dc term) is given

os(60°)

0°)

tive power calculatio

ve power calculat

LETE

ETE

ACTACT

ETE

60°60°

CUCU

VOLTAGEOLTAG

Figure 21. Active Power Cure 21. Active Power C

Nonsinusoidal Voltage anusoidal Voltage a

The active power calculatower calcula

nonsinusoidal currentnonsinusoidal current

current waveformscurrent waveform

harmonic conteharmonic conte

voltage and cvoltage and

their harmtheir har

ms. be fur power fuclur, um. npms u 7 kHz Hz. cl: un the aetivc power [cu of offsets on the active he frequeney domain. ><(11, +1j="">< cus(mlj)="(5)" v}="" x="" 1,="" t+="" v”="" x="" 1‘="" x="" cos(mr)+v,="" x="" (l,="" x="" cus(mt)="" en="" from="" equation="" 5="" and="" figure="" 22,="" m="" uffsc="" and="" channel="" 2="" contributes="" a="" dc="" lumpunenl="" a="" nun.="" because="" this="" dc="" componenl="" is="" extruded="" d="" lu="" generate="" the="" active="" power="" ibule="" a="" constant="" error="" [0="" the="" ac="" problem="" a:="" may="" avoided="" m="" the="" a="" :ouzucv="" new="" xennnmea="" nus:="" (names)="" é="">

ADE7761

Rev. A | Page 17 of 28

Using Equations 1 and 2, the active power P can be expressed in

terms of its fundamental active power (P1) and harmonic active

power (PH):

1PPP 

where:

111

1111 IVP

ED )

)u )cos( (3)

and

hhh

hhhh

HIVP

ED )

)uu ¦

)cos(

2 (4)

As can be seen from Equation 4, a harmonic active power

component is generated for every harmonic, provided that

harmonic is present in both the voltage and current waveforms.

The power factor calculation has previously been shown to be

accurate in the case of a pure sinusoid; the harmonic active

power must, therefore, also correctly account for power factor,

because it is made up of a series of pure sinusoids.

Note that the input bandwidth of the analog inputs is 7 kHz

with the internal oscillator frequency of 450 kHz.

HPF and Offset Effects

Equation 5 shows the effect of offsets on the active power

calculation. Figure 22 shows the effect of offsets on the active

power calculation in the frequency domain.

)cos()cos(

))cos(())cos((

)()(

tIVtIV

tIItVV

tItV

0110

1010

ZuuZuu

u

ZuuZu

(5)

As can be seen from Equation 5 and Figure 22, an offset on

Channel 1 and Channel 2 contributes a dc component after

multiplication. Because this dc component is extracted by the

LPF and used to generate the active power information, the

offsets contribute a constant error to the active power calcula-

tion. This problem is easily avoided in the ADE7761 with the

HPF in Channel 1. By removing the offset from at least one

channel, no error component can be generated at dc by the

multiplication. Error terms at cos(ωt) are removed by the LPF

and the digital-to-frequency conversion (see the Digital-to-

Frequency Conversion section).

The HPF in Channel 1 has an associated phase response that is

compensated for on-chip. Figure 23 and Figure 24 show the

phase error between channels with the compensation network

activated. The ADE7761 is phase compensated up to 1 kHz as

shown, which ensures correct active harmonic power

calculation even at low power factors.

04407-0-024

DC COMPONENT (INCLUDING ERROR TERM)

IS EXTRACTED BY THE LPF FOR ACTIVE

POWER CALCULATION

FREQUENCY (RAD/S)

× I

Figure 22. Effect of Channel Offsets on the Active Power Calculation

FREQUENCY (Hz)

0100

PHASE (Degrees)

–0.05

–0.10

0.05

0.10

0.15

0.20

0.25

0.30

200 300 400 500 600 700 800 900 1000

04407-0-025

Figure 23. Phase Error between Channels (0 Hz to 1 kHz)

FREQUENCY (Hz)

PHASE (Degrees)

–0.05

–0.10

0.05

0.10

0.15

0.20

0.25

0.30

45 50 55 60 65 70

04407-0-026

Figure 24. Phase Error between Channels (40 Hz to 70 Hz)

OBSOLE

Hz Hz

active power ctive power

offsets on the active ffsets on the active

main. in.

)cos( )cos(

))cos( )cos(

IVtI IVtI

)( )(

((

)cos(cos(

IVtI IVt

)cos( )cos(

IV I

))cos( )cos(

cos(cos(

rom Equation 5 and Figure 2om Equation 5 and Figure 2

d Channel 2 contributes a dc

Channel 2 contributes a dc

n. Because this dc compon

ecause this dc com

generate the activegenerate the activ

constant erroconstant erro

sily av

LETE

QUENCY UENCY

nel Offsets on the Ael Offsets on the

LETE

PHASE (DegrASE (Deg

–0.055

–0.10–0.10

0.050.05

0.100.1

0.15.15

he quency conversion for constant voltage and current. As can be ency output CF varies over time, ondllion hrs frequency variation is mt) component in the instantaneous al, 1 DIGITAL-IO. rnzqumcv FREQUENCY FREOUENCV R my 4» anrrAL-Yo. Four N) he frequency counter, whlc ng used to measure energy, s application, the CF output s ower. Because the outputs F lower trequency, a lot more aver we power signal is carried on ' h attenuated sinusoidal content and a vrrtuall output. SFER FUNCTION equency Outputs F1 and ’ The ADE7761 calculates th Channel 1 and Channel to extract active powe matiun is then conver intonnation is output pulses. The pulse rate example, 034 Hz max Table 7). This means ge

ADE7761

Rev. A | Page 18 of 28

DIGITAL-TO-FREQUENCY CONVERSION

As previously described, the digital output of the low-pass filter

after multiplication contains the active power information.

However, because this LPF is not an ideal “brick wall” filter

implementation, the output signal also contains attenuated

components at the line frequency and its harmonics, that is,

cos(hωt), where h = 1, 2, 3, …, and so on. The magnitude

response of the filter is given by

)Hz5.4/(1

)(

(6)

For a line frequency of 50 Hz, this gives an attenuation of the 2ω

(100 Hz) component of approximately –26.9 dB. The dominat-

ing harmonic is at twice the line frequency, cos(2ωt), due to the

instantaneous power signal.

Figure 25 shows the instantaneous active power signal output of

the LPF, which still contains a significant amount of instantane-

ous power information, cos(2ωt). This signal is then passed to

the digital-to-frequency converter, where it is integrated

(accumulated) over time to produce an output frequency. This

accumulation of the signal suppresses or averages out any non-

dc components in the instantaneous active power signal. The

average value of a sinusoidal signal is zero. Therefore, the

frequency generated by the ADE7761 is proportional to the

average active power.

Figure 25 also shows the digital-to-frequency conversion for

steady load conditions: constant voltage and current. As can be

seen in Figure 25, the frequency output CF varies over time,

even under steady load conditions. This frequency variation is

primarily due to the cos(2ωt) component in the instantaneous

active power signal.

DIGITAL-TO-

FREQUENCY

DIGITAL-TO-

FREQUENCY

MULTIPLIER LPF

0Y2Y

FREQUENCY (Rad/s)

LPF TO EXTRACT

ACTIVE POWER

(DC TERM)

TIME

04407-0-027

FREQUENCY FREQUENCY

FOUT

INSTANTANEOUS ACTIVE POWER SIGNAL (FREQUENCY DOMAIN

)

Figure 25. Active Power to Frequency Conversion

The output frequency on CF can be up to 2048 times higher

than the frequency on F1 and F2. This higher output frequency

is generated by accumulating the instantaneous active power

signal over a much shorter time while converting it to a

frequency. This shorter accumulation period means less

averaging of the cos(2ωt) component. As a consequence, some

of this instantaneous power signal passes through the digital-to-

frequency conversion. This is not a problem in the application.

Where CF is used for calibration purposes, the frequency

should be averaged by the frequency counter, which removes

any ripple. If CF is being used to measure energy, such as in a

microprocessor-based application, the CF output should also be

averaged to calculate power. Because the outputs F1 and F2

operate at a much lower frequency, a lot more averaging of the

instantaneous active power signal is carried out. The result is a

greatly attenuated sinusoidal content and a virtually ripple-free

frequency output.

TRANSFER FUNCTION

Frequency Outputs F1 and F2

The ADE7761 calculates the product of two voltage signals (on

Channel 1 and Channel 2) and then low-pass filters this product

to extract active power information. This active power infor-

mation is then converted to a frequency. The frequency

information is output on F1 and F2 in the form of active high

pulses. The pulse rate at these outputs is relatively low, for

example, 0.34 Hz maximum for ac signals with S0 = S1 = 0 (see

Table 7). This means that the frequency at these outputs is

generated from active power information accumulated over a

relatively long period of time. The result is an output frequency

that is proportional to the average active power. The averaging

of the active power signal is implicit to the digital-to-frequency

conversion. The output frequency or pulse rate is related to the

input voltage signals by the following equation:

2170.5

REF

rmsrms

FrequencyFF 

uuu

 (7)

where:

F1 í F2 Frequency is the output frequency on F1 and F2 (Hz).

V1rms is the differential rms voltage signal on Channel 1 (V).

V2rms is the differential rms voltage signal on Channel 2 (V).

VREF is the reference voltage (2.5 V ± 8%) (V).

F1–4 is one of four possible frequencies selected by using the

logic inputs S0 and S1 (see Table 5).

OBSOLE

version for version for

urrent. As can be urrent. As can be

varies over time, ies over time,

frequency variation is ncy variation is

nent in the instantaneous nent in the instantaneous

F1F

F2F

DIGITAL-TO-TAL-TO

FREQUENCYENCY

DIGITALDIGITA

FREQ

LETE

FREQUENCYQUENCY

F1F1

ncy coucy co

to measure eno measure e

cation, the CF outpcation, the CF ou

wer. Because the outputs F

wer frequency, a lot more avewer frequency, a lot more ave

ve power signal is carried ouve power signal is carried ou

ted sinusoidal content and a d sinusoidal content and a

output. utput.

NSFER FUNCTION SFER FUNCT

equency Outputs F1 and Fuency Outputs F1 an

The ADE7761 calculates th7761 calculates th

Channel 1 and Channel d Channel

to extract active powto extract active pow

mation is then conmation is then co

information is information is

pulses. Thepulses. The

exampleexa

TableTab

gege

am y for ac mp input 6|g|1a1>.'lhbls 7 shows a com in output frequencies for ac signals, Maximum Output Frequency on c AC Inpms Fl, F2 Maximum c scr 51 so Frequency (Hz) F after 1 U 0 0.34 4 3h, 0 o o 0.34 2 1 o 1 0.68 4 d mu m ihc U 0 1 0.68 2 1:6: averaging 61 1 1 u 1.26 more responsive 0 1 0 1.26 1 1 1 2.72 U 1 1 and F1, F2 Frequency FAULT DETEC (F Frequency Output The A 1.72 128 x 1-1, F2 warns 1.72 64 X F1, F2 accura 3.44 64 X F1, F2 cumin 3.44 32 X F1, F2 6.86 32 X F1, F2 6.86 16 X F1,1-2 13.7 16 X F1,1-2 13.7 2043 x F1, F2 ii ac voltages or :650 111V pcuk are app hc expected on ’52

ADE7761

Rev. A | Page 19 of 28

Table 5. F1–4 Frequency Selection

S1 S0 F1–4 (Hz)1 OSC/CLKIN2

0 0 1.72 OSC/218

0 1 3.44 OSC/217

1 0 6.86 OSC/216

1 1 13.7 OSC/215

1 Values are generated using the nominal frequency of 450 kHz.

2 F1–4 are a binary fraction of the master clock and, therefore, vary with the

internal oscillator frequency (OSC).

Frequency Output CF

The pulse output calibration frequency (CF) is intended for use

during calibration. The output pulse rate on CF can be up to

2048 times the pulse rate on F1 and F2. The lower the F1–4

frequency selected, the higher the CF scaling. Table 6 shows

how the two frequencies are related, depending on the states of

the logic inputs S0, S1, and SCF. Because of its relatively high

pulse rate, the frequency at this logic output is proportional to

the instantaneous active power. As with F1 and F2, the

frequency is derived from the output of the low-pass filter after

multiplication. However, because the output frequency is high,

this active power information is accumulated over a much

shorter time. Therefore, less averaging is carried out in the

digital-to-frequency conversion. With much less averaging of

the active power signal, the CF output is much more responsive

to power fluctuations (see Figure 20).

Table 6. Relationship between CF and F1, F2 Frequency

Outputs

SCF S1 S0 F1–4 (Hz) CF Frequency Output

1 0 0 1.72 128 × F1, F2

0 0 0 1.72 64 × F1, F2

1 0 1 3.44 64 × F1, F2

0 0 1 3.44 32 × F1, F2

1 1 0 6.86 32 × F1, F2

0 1 0 6.86 16 × F1, F2

1 1 1 13.7 16 × F1, F2

0 1 1 13.7 2048 × F1, F2

Example

In this example, if ac voltages of ±660 mV peak are applied to

V1 and V2, then the expected output frequency on CF, F1, and

F2 is calculated as follows:

F1–4 = 1.7 Hz, SCF = S1 = S0 = 0

V1rms = rms of 660 mV peak ac = 0.66/√2 V

V2rms = rms of 660 mV peak ac = 0.66/√2 V

VREF = 2.5 V (nominal reference value)

Note that if the on-chip reference is used, actual output

frequencies may vary from device to device due to a reference

tolerance of ±8%.

Hz0.2264

Hz34.0

5.222

Hz72.166.066.070.5

u

uuu



FFFrequencyCF

FrequencyFF 21

As can be seen from these two example calculations, the

maximum output frequency for ac inputs is always half of that

for dc input signals. Table 7 shows a complete listing of all

maximum output frequencies for ac signals.

Table 7. Maximum Output Frequency on CF, F1, and F2 for

AC Inputs

SCF S1 S0

F1, F2 Maximum

Frequency (Hz)

CF Maximum

Frequency (Hz)

CF to

Ratio

1 0 0 0.34 43.52 128

0 0 0 0.34 21.76 64

1 0 1 0.68 43.52 64

0 0 1 0.68 21.76 32

1 1 0 1.36 43.52 32

0 1 0 1.36 21.76 16

1 1 1 2.72 43.52 16

0 1 1 2.72 5570 2048

FAULT DETECTION

The ADE7761 incorporates a novel fault detection scheme that

warns of fault conditions and allows the ADE7761 to continue

accurate billing during a fault event. The ADE7761 does this by

continuously monitoring both the phase and neutral (return)

currents. A fault is indicated when these currents differ by more

than 6.25%. However, even during a fault, the output pulse rate

on F1 and F2 is generated using the larger of the two currents.

Because the ADE7761 looks for a difference between the voltage

signals on V1A and V1B, it is important that both current trans-

ducers be closely matched.

On power-up, the output pulse rate of the ADE7761 is pro-

portional to the product of the voltage signals on V1A and

Channel 2. If there is a difference of greater than 6.25% between

V1A and V1B on power-up, the fault indicator (FAULT) becomes

active after about 1 s. In addition, if V1B is greater than V1A, the

ADE7761 selects V1B as the input. The fault detection is

automatically disabled when the voltage signal on Channel 1 is

less than 0.3% of the full-scale input range. This eliminates false

detection of a fault due to noise at light loads.

OBSOLETE

sive

equency ency

quency Output quency Output

× F1, F2 F1, F

64 × F1, F2 F1, F2

64 × F1, F2 64 × F1, F2

32 × F1, F2 32 × F

32 × F1, F2 32 × F1, F2

86 16 × F1, F2 16 × F1, F2

13.7 16 × F1, F2 13.7 16 × F1, F2

13.7 2048 × F113.7 2048 × F

if ac voltages of ±66

f ac voltages of ±6

e expected oue expected ou

ws:

exa

y for ac inpfor ac

e 7 shows a come 7 shows a com

quencies for ac signals.uencies for ac signals.

um Output Frequency on C

S1 S0 S1 S

F1, F2 Maximum F2 Max

Frequency (Hz) ency (H

0 0 0.34 0 0

0 0 0 0.34 0 0 0.34

1 0 1 0.68 0 1 0.68

0 0 1 0.680 1 0.68

1 1 0 10

0 1 0 0

1 1 1 1

0 1 0 1

billing is maintained on via, that is, no occurs. Via remains the active input. FAuL'I FIL'IER AND if comma: m f— E Arno-rive pomr. INACTIVE INPM g INPuY a no"; Imam (Ilput Greater than lllatrlve lnpul Input Greater than Active Input another fault condition. if the difference tive input, and vn, the active input (that is, ), becomes greater than 6.25% of Via, the es active, and there is also a swap over to the analog input V n. becomes the active input. Again, ant or about 3 s associated with this swap, back to being the active channel until Vi \ is he difference between Via and leilﬂ this ater than 6.25% of Via, However, the comes inactive as soon as Via is within threshold eliminates potential chatter FIL'IER _1 f» affec calibration and can be used as a means to test the of the fault detection. IEL cr 0» :Ié' n: in. Minn f V VI IB av ,, 1:51 : 3| “'3 l "'3‘ t» cuRREm "a: E . 5 a CT R v ' a z r i as- a. :2 Hr g F van vlr 47 Hr Vzu ® or mums 3 ‘RBoVR=RF Figure 22. Fault Conditions 1m (Ilamve lnpmGrealer ma It the neutral circuit is chosen for the current circu arrangement shown in Figure 28, this may have im the calibration accuracy. lhe ADE7761 powers up input active as normal. However, because there is n the phase circuit, the signal on vm is zero. This eau be ﬂagged and the active input to be swapped to V The meter can be calibrated in this mode, but the neutral C'l‘s might differ slightly. Because under no tions all billing IS carried out using the phase C'l‘,t should be calibrated using the phase circuit. or co phase and neutral Circuits can be calibrated. MISSING NEUTRAL MODE

ADE7761

Rev. A | Page 20 of 28

Fault with Active Input Greater than Inactive Input

If V1A is the active current input (that is, being used for billing),

and the voltage signal on V1B (inactive input) falls below 93.75%

of V1A, the fault indicator becomes active. Both analog inputs are

filtered and averaged to prevent false triggering of this logic

output. As a consequence of the filtering, there is a time delay of

approximately 3 s on the logic output FAULT after the fault

event. The FAULT logic output is independent of any activity on

outputs F1 or F2. Figure 26 shows one condition under which

FAULT becomes active. Because V1A is the active input and it is

still greater than V1B, billing is maintained on V1A, that is, no

swap to the V1B input occurs. V1A remains the active input.

AGND

FILTER

AND

COMPARE

MULTIPLIER

FAULT

< 93.75% OF V

<0 ACTIVE POINT – INACTIVE INPUT

6.25% OF ACTIVE INPUT

04407-0-028

FAULT

Figure 26. Fault Conditions for Active Input Greater than Inactive Input

Fault with Inactive Input Greater than Active Input

Figure 27 illustrates another fault condition. If the difference

between V1B, the inactive input, and V1A, the active input (that is,

being used for billing), becomes greater than 6.25% of V1B, the

FAULT indicator goes active, and there is also a swap over to the

V1B input. The analog input V1B becomes the active input. Again,

there is a time constant of about 3 s associated with this swap.

V1A does not swap back to being the active channel until V1A is

greater than V1B and the difference between V1A and V1B—in this

order—becomes greater than 6.25% of V1A. However, the

FAULT indicator becomes inactive as soon as V1A is within

6.25% of V1B. This threshold eliminates potential chatter

between V1A and V1B.

AGND

FILTER

AND

COMPARE

MULTIPLIER

FAULT

< 93.75% OF V

<0 ACTIVE POINT – INACTIVE INPUT

6.25% OF INACTIVE INPUT

04407-0-029

FAULT + SWAP

Figure 27. Fault Conditions for Inactive Input Greater than Active Input

Calibration Concerns

Typically, when a meter is being calibrated, the voltage and

current circuits are separated as shown in Figure 28. This means

that current passes through only the phase or neutral circuit.

Figure 28 shows current being passed through the phase circuit.

This is the preferred option, because the ADE7761 starts billing

on the input V1A on power-up. The phase circuit CT is con-

nected to V1A in the diagram. Since there is no current in the

neutral circuit, the FAULT indicator comes on under these

conditions. However, this does not affect the accuracy of the

calibration and can be used as a means to test the functionality

of the fault detection.

AGND

RB 0V

PHASE

NEUTRAL

*RB + VR = RF

VR*

RB*

RA*

TEST

URRENT

240V RMS

04407-0-030

Figure 28. Fault Conditions for Inactive Input Greater than Active Input

If the neutral circuit is chosen for the current circuit in the

arrangement shown in Figure 28, this may have implications for

the calibration accuracy. The ADE7761 powers up with the V1A

input active as normal. However, because there is no current in

the phase circuit, the signal on V1A is zero. This causes a fault to

be flagged and the active input to be swapped to V1B (neutral).

The meter can be calibrated in this mode, but the phase and

neutral CTs might differ slightly. Because under no-fault condi-

tions all billing is carried out using the phase CT, the meter

should be calibrated using the phase circuit. Of course, both

phase and neutral circuits can be calibrated.

MISSING NEUTRAL MODE

The ADE7761 integrates a novel fault detection that warns and

allows the ADE7761 to continue to bill in case a meter is

connected to only one wire (see Figure 29). For correct

operation of the ADE7761 in this mode, the VDD pin of the

ADE7761 must be maintained within the specified range (5 V ±

5%). The missing neutral detection algorithm is designed to

work over a line frequency of 45 Hz to 55 Hz.

put ut

put

e difference e difference

ctive input (that is, tive input (that is,

an 6.25% of V.25% of V

1B1B

, the , the

is also a swap over to the s also a swap over to the

mes the active input. Again, mes the active input. Again,

3 s associated with this swap3 s associated with this swap

ng the active channel until Vthe active channel un

fference between Vbetween

and Vand V

r than 6.25% of Vr than 6.25% of V

1A1A

. Howeve. Howeve

comes inactive as soon as V

omes inactive as soon as V

threshold eliminates poten

reshold eliminates p

affec

means to tmeans

ETE

AGNDAG

CTCT

RBB

1AA

IBIB

PHASEPHASE

NEUTRALNEUTRA

LET

RA*A*

RENTNT

LET

>6 [ante] >6 E IEO] outputs can he adiusted zERo emsma El'EcnnM L mssmu "mm mm AmusMEm mm. m inquiucv means Hi cr 71 F2 re 347, Energy Calculation in Mining Neutral Mode Analog Devrces lnc. cautions users onhe ADE analog input vii , v;N due: described in Figure 32, the AD energy, but a quantity propurl to generate pulses on the sam indicated when the FAULT pi . Billing active energy in Case 1 is consists understanding of the quan CF, F1, and F2 output: . Billing active energy wh be decided knuwrng th ADE7761 in the case ie Users should be aware ADE7761 is Missing Neutm The ADE7761 co delecl value crosei AGND

ADE7761

Rev. A | Page 21 of 28

RB 0V

V1A

*RB + VR = RF

VR*

RB*

RA*

04407-0-031

LOAD

240V RMS

POWER

GENERATOR

Figure 29. Missing Neutral System Diagram

The ADE7761 detects a missing neutral condition by continu-

ously monitoring the voltage channel input (V2P–V2N). The

FAULT pin is held high when a missing neutral condition is

detected. In this mode, the ADE7761 continues to bill the

energy based on the signal level on the current channel (see

Figure 30). The billing rate or frequency outputs can be adjusted

by changing the dc level on the MISCAL pin.

MISSING NEUTRAL

GAIN ADJUSMENT DIGITAL-

TO-

FREQUENCY

CONVERTERS

CF F1 F2

04407-0-032

ZERO

CROSSING

DETECTION

A > B

B > A

B <> A

ADC

MISCA

LPF

HPF

Figure 30. Energy Calculation in Missing Neutral Mode

Important Note for Billing of Active Energy

The ADE7761 provides pulse outputs—CF, F1, and F2—

intended to be used for the billing of active energy. Pulses are

generated at these outputs in two different situations.

Case 1: When the analog input V2P – V2N complies with the

conditions described in Figure 32, CF, F1, and F2 frequencies

are proportional to active power and can be used to bill active

energy.

Case 2: When the analog input V2P – V2N does not comply with

the conditions described in Figure 32, the ADE7761 does not

measure active energy, but a quantity proportional to kAh. This

quantity is used to generate pulses on the same CF, F1, and F2.

This situation is indicated when the FAULT pin is high.

Analog Devices Inc. cautions users of the ADE7761:

xBilling active energy in Case 1 is consistent with the

understanding of the quantity represented by pulses on

CF, F1, and F2 outputs (watt-hour).

xBilling active energy while the ADE7761 is in Case 2 must

be decided knowing that the entity measured by the

ADE7761 in this case is ampere-hour and not watt-hour.

Users should be aware of this limitation and decide if the

ADE7761 is appropriate for their application.

Missing Neutral Detection

The ADE7761 continuously monitors the voltage input and

detects a missing neutral condition when the voltage input peak

value is smaller than 9% of the analog full scale or when no zero

crossings are detected on this input (see Figure 31).

FSFS

04407-0-033

9% OF FS

FILTER AND

THRESHOLD

AGND

ADC

MISSING

NEUTRAL

|V2|

PEAK

< 9% OF FULL SCALE

–V

NO ZERO-CROSSING ON V2OR

Figure 31. Missing Neutral Detection

OBSOLETE

BSO

DIGITAL-DIGITAL-

TO-TO-

FREQUENCYFREQUENCY

CONVERTERSRTERS

CFCF

LPFLPF

gy Calculation in Missing Neutral ation in Missing Neutra

ut V

2P2P

n Figure 32, tn Figure 32

but a quantibut a quanti

ty propty p

generate pulsenerate puls

es on the sames on the sam

indicated when the FAULT pndicated when the FAULT p

vices Inc. cautions users of thices Inc. cautions users of th

Billing active energy in Case illing active energy in C

understanding of the quanunderstanding of the quan

CF, F1, and F2 outputsCF, F1, and F2 ou

Billing active eneBilling active ene

be decided knecided kn

ADE7761 iE7761

Users shUsers s

ADEADE

Mississ

f _. _. 1 a no energy is vel. The an be done applying a dc equivalent to applying, in voltage inpm wnh a peak can vary from 0 V to ion). when set in 0 v, the e lo zem. when sel m 660 mV dc, the e that when MISCAL is at 330 mV qllauon 7 ean he used in missing neutral MISCAL...” ‘5. 570 x MISCALW Ni x FH ency : # (a) m :330 mV pe led output frequenc SCF : $1 : so = o rms of 330 mV peak ac : 0.33/6 v2 : rms of 330 mV peak 2: : 0 vii;P : 2.5 v (nominal referen 5,70X0,3 J? f CF Frequency : F, , 2 ﬁe F, , F2 Frequency : Ln missing neulial mo toV1,no Slgnal is can applied to MISCAL. w lion as the on CF, l-‘l, FJ"

ADE7761

Rev. A | Page 22 of 28

The ADE7761 leaves the missing neutral mode for normal

operation when both conditions are no longer valid—voltage

peak value greater than 9% of full scale and zero crossing on the

voltage channel detected (see Figure 32).

04407-0-034

FILTER AND

THRESHOLD

GND

ADC

MISSING

NEUTRAL

|V2|

PEAK

> 9% OF FULL SCALE

AND

ZERO-CROSSING ON V2

+9% OF FS

–9% OF FS

–V

Figure 32. Return to Normal Mode after Missing Neutral Detection

Missing Neutral Gain Calibration

When the ADE7761 is in missing neutral mode, the energy is

billed based on the active current input signal level. The

calibration of the frequency outputs in this mode can be done

with the MISCAL analog input pin. In this mode, applying a dc

voltage of 330 mV on MISCAL is equivalent to applying, in

normal mode, a pure sine wave on the voltage input with a peak

value of 330 mV. The MISCAL input can vary from 0 V to

660 mV (see the Analog Inputs section). When set to 0 V, the

frequency outputs are close to zero. When set to 660 mV dc, the

frequency outputs are twice that when MISCAL is at 330 mV

dc. In other words, Equation 7 can be used in missing neutral

mode by replacing V2rms by MISCALrms √2:

2/70.5

REF

rms

FMISCAL

FrequencyFF 

(8)

where:

F1, F2 Frequency is the output frequency on F1 and F2 (Hz).

V1rms is the differential rms voltage signal on Channel 1 (V).

MISCALrms is the differential rms voltage signal on the MISCAL

pin (V).

VREF is the reference voltage (2.5 V ± 8%) (V).

F1-4 is one of four possible frequencies selected by using the

logic inputs S0 and S1 (see Table 5).

Example

In normal mode, ac voltages of ±330 mV peak are applied to V1

and V2, and then the expected output frequency on F1 and F2 is

calculated as follows:

F1–4 = 1.7 Hz, SCF = S1 = S0 = 0

V1 = rms of 330 mV peak ac = 0.33/√2 V

V2 = rms of 330 mV peak ac = 0.33/√2 V

VREF = 2.5 V (nominal reference value)

Hz4.564

Hz084.0

5.222

Hz7.133.033.070.5

u

frequencyFFFrequencyCF

FrequencyFF 21

In missing neutral mode, ac voltage of ±330 mV peak is applied

to V1, no signal is connected on V2, and 330 mV dc input is

applied to MISCAL. With the ADE7761 in the same configura-

tion as the previous example, the expected output frequencies

on CF, F1, and F2 are

Hz4.564,

Hz084.0

5.22

Hz7.12/33.033.070.5

uuu

frequencyFFFrequencyCF

FrequencyFF 21

OBSOLET

dc dc

ith a peak peak

m 0 V to

set to 0 V, the set to 0 V,

t to 660 mV dc, the o 660 mV dc, the

ISCAL is at 330 mV L is at 330 mV

used in missing neutral used in missing neutral

ALAL

rms rms

√√

: :

OBS

2//

REFREF

rmsrms

MISCALMISCAL

ETE

±330 mV pe±330 mV p

ed output frequenced output freque

CFCF

= =

S1S1

= 0 = 0

of 330 mV peak ac = 0.33/√of 330 mV peak ac = 0.33/√

= rms of 330 mV peak ac = 0= rms of 330 mV peak ac =

REFEF

= 2.5 V (nominal refe = 2.5 V (nominal r

Frequencyrequen

CFC

Frequencyequency

In missing nIn missing n

to V1, noto V1, no

applieapp

tiotio

Mcu COUM'IER I urinowu LOGIC F m: MEIER ls BIDIRECYIDNAL on FLOW IS NEEDED. - YO RECORD ENEmv in nu“ chDmoN. lnmlaring me A 761 to an Mcu ncy output CF is connected to an MCU counts the number ot pulses in a given determined by an MCU internal timer, The proportional to the average frequency, is C t ency = AverageA : ﬂ rr Ions. However, over a mmlll has no ripple. REQUENCY FOR AN E ATION Table 5, the user can select one of queney selection determines the maxi and F2. These outputs are intended to b y register (electromechanical or other). B ferent output frequencies ca frequency selection has be 100 impulses/kWh with a and 120 A. Table 8 Show: maximum currents (1Ml\.\) cases, the meter constant Tab]: 8. F1 and F2 Freq“ IMAX (A) 12.5 25 40 60 80 120

ADE7761

Rev. A | Page 23 of 28

APPLICATIONS

INTERFACING TO A MICROCONTROLLER FOR

ENERGY MEASUREMENT

The easiest way to interface the ADE7761 to a microcontroller

is to use the CF high frequency output with the output

frequency scaling set to 2048 × F1, F2. This is done by setting

SCF = 0 and S0 = S1 = 1 (see Table 7). With full-scale ac signals

on the analog inputs, the output frequency on CF is approxi-

mately 5.5 kHz. Figure 33 illustrates one scheme that could be

used to digitize the output frequency and carry out the

necessary averaging mentioned in the previous section.

TIME

±10%

AVERAGE

FREQUENCY

CF FREQUENCY

RIPPLE

MCU

UP/DOWN

COUNTER

LOGIC

REVP*

ADE7761

FAULT**

04407-0-035

*REVP MUST BE USED IF THE METER IS BIDIRECTIONAL OR

DIRECTION OF ENERGY FLOW IS NEEDED.

*FAULT MUST BE USED TO RECORD ENERGY IN FAULT CONDITION.

Figure 33. Interfacing the ADE7761 to an MCU

As shown, the frequency output CF is connected to an MCU

counter or port, which counts the number of pulses in a given

integration time, determined by an MCU internal timer. The

average power, proportional to the average frequency, is given

Time

Counter

PowerActiveAverageFrequencyAverage

The energy consumed during an integration period is given by

CounterTime

Tim

Counter

TimePowerAverageEnergy u u

For the purpose of calibration, this integration time could be

10 s to 20 s in order to accumulate enough pulses to ensure

correct averaging of the frequency. In normal operation, the

integration time could be reduced to 1 s or 2 s depending, for

example, on the required update rate of a display. With shorter

integration times on the MCU, the amount of energy in each

update may still have a small amount of ripple, even under

steady load conditions. However, over a minute or more, the

measured energy has no ripple.

SELECTING A FREQUENCY FOR AN ENERGY

METER APPLICATION

As shown in Table 5, the user can select one of four frequencies.

This frequency selection determines the maximum frequency

on F1 and F2. These outputs are intended to be used to drive the

energy register (electromechanical or other). Because only four

different output frequencies can be selected, the available

frequency selection has been optimized for a meter constant of

100 impulses/kWh with a maximum current of between 10 A

and 120 A. Table 8 shows the output frequency for several

maximum currents (IMAX) with a line voltage of 240 V. In all

cases, the meter constant is 100 impulses/kWh.

Table 8. F1 and F2 Frequency at 100 Impulses/kWh

IMAX (A) F1 and F2 (Hz)

12.5 0.083

25 0.166

40 0.266

60 0.4

80 0.533

120 0.8

The F1–4 frequencies allow complete coverage of this range of

output frequencies on F1 and F2. When designing an energy

meter, the nominal design voltage on Channel 2 (voltage)

should be set to half-scale to allow for calibration of the meter

constant. The current channel should also be no more than half-

scale when the meter sees maximum load, which accommodates

overcurrent signals and signals with high crest factors. Table 9

shows the output frequency on F1 and F2 when both analog

inputs are half-scale. The frequencies listed in Table 9 align well

with those listed in Table 8 for maximum load.

OBSOLET

04407-0-035035

CTIONAL ORTIONAL

GY IN FAULT CONDITION.FAULT CONDITION.

he ADE7761 to an MCU he ADE7761 to an MCU

utput CF is connected to an Mutput CF is connected to an

counts the number of pulses ts the number of pul

ermined by an MCU internaermined by an MCU intern

roportional to the average freoportional to the average fre

AcA

AverageAverage

encyency

urin

ETE

r, o

ple. ple.

QUENCY FOR AQUENCY FOR

ATION ATION

ble 5, the user can select oneble 5, the user can select one

ncy selection determines the ncy selection determines the

d F2. These outputs are intend F2. These outputs are inten

y register (electromechanicay register (electromechan

fferent output frequencies caferent output frequencies ca

frequency selection has beerequency selection ha

100 impulses/kWh with impulses/kWh with

and 120 A. Table 8 sh0 A. Table 8 sh

maximum currentm curren

cases, the metehe mete

Table 8. FTable 8. F

MAXMAX

(A) (A

12.5

quency to be used produces u hat is propor- requencles are given in he period at CF (Ls) falls to halt the period. For he CF pulse width is h a mate using SCF : 1, s in output frequency at F1 or F2 is 0, The minimum output trequency at Fl 0 .68 Hz or 3.06 x 10*5 Hz. This is 1.9 64 x H Hz). [his example, the noeload threshold is eq ad or a startup current of 4.6 mA at 240 V the lECéioss speciﬁcation, which states start up with aload equal to or less than 0.4 meter, 0.4% of la is equivaleu Note that the unload thtesh high CF frequency mode: sc NEGATIVE POWE The ADE7761 detects have a phase shift gte wrong can The REVP deleeted, a REVP pm

ADE7761

Rev. A | Page 24 of 28

Table 9. F1 and F2 Frequency with Half-Scale AC Inputs

S0 S1 F1–4

Frequency on F1 and F2,

Ch 1 and Ch 2,

Half-Scale AC Inputs (Hz)

0 0 1.72 0.085

0 1 3.44 0.17

1 0 6.86 0.34

1 1 13.5 0.68

When selecting a suitable F1–4 frequency for a meter design, the

frequency output at IMAX (maximum load) with a meter constant

of 100 impulses/kWh should be compared with Column 4 of

Table 9. The frequency that is closest in Table 9 determines the

best choice of frequency (F1-4). For example, if a meter with a

maximum current of 40 A is being designed, the output

frequency on F1 and F2 with a meter constant of

100 impulses/kWh is 0.266 Hz at 40 A and 240 V (from

Table 8). Looking at Table 9, the closest frequency to 0.266 Hz

in Column 4 is 0.17 Hz. Therefore, F2 (3.4 Hz; see Table 5) is

selected for this design.

Frequency Outputs

Figure 2 shows a timing diagram for the various frequency

outputs. The high frequency CF output is intended to be used

for communications and calibration purposes. CF produces a

90 ms wide, active high pulse (t4) at a frequency that is propor-

tional to active power. The CF output frequencies are given in

Table 7. As in the case of F1 and F2, if the period of CF (t5) falls

below 180 ms, the CF pulse width is set to half the period. For

example, if the CF frequency is 20 Hz, the CF pulse width is

25 ms.

No-Load Threshold

The ADE7761 includes a no-load threshold and startup current

feature that eliminates creep effects in the meter. The ADE7761

is designed to issue a minimum output frequency. Any load

generating a frequency lower than this minimum frequency

does not cause a pulse to be issued on F1, F2, or CF. The mini-

mum output frequency is given as 0.0045% of the full-scale

output frequency. (See Table 7 for maximum output frequencies

for ac signals).

For example, an energy meter with a meter constant of

100 impulses/kWh on F1, F2 using SCF = 1, S1 = 0, and S0 = 1,

the maximum output frequency at F1 or F2 is 0.68 Hz and 43.52

Hz on CF. The minimum output frequency at F1 or F2 is

0.0045% of 0.68 Hz or 3.06 × 10–5 Hz. This is 1.96 × 10–3 Hz at

CF (64 × F1 Hz).

In this example, the no-load threshold is equivalent to 1.1 W of

load or a startup current of 4.6 mA at 240 V. Compare this value

to the IEC61036 specification, which states that the meter must

start up with a load equal to or less than 0.4% IB. For a 5 A (IB)

meter, 0.4% of IB is equivalent to 20 mA.

Note that the no-load threshold is not enabled when using the

high CF frequency mode: SCF = 0, S1 = S0 = 1.

NEGATIVE POWER INFORMATION

The ADE7761 detects when the current and voltage channels

have a phase shift greater than 90q. This mechanism can detect

wrong connection of the meter or generation of negative power.

The REVP pin output goes active high when negative power is

detected, and active low when positive power is detected. The

REVP pin output changes state as a pulse is issued on CF.

OBSOLE

or-or-

en in in

F (t

) falls falls

period. For period. For

ulse width is ulse width

ETE

h a meteh a me

using SCF = 1, Susing SCF = 1

uency at F1 or F2 is 0.ency at F1 or F2

m output frequency at F1 o

or 3.06 × 10r 3.06

–55

Hz. This is 1.96 Hz. This is 1.9

mple, the no-load threshold isple, the no-load thres

a startup current of 4.6 mA astartup current of 4.6 mA

e IEC61036 specification, whIEC61036 specification, wh

art up with a load equal to orp with a load equal to

meter, 0.4% of I% of I

is equivale is equivale

Note that the no-load Note that the no-load

high CF frequencyhigh CF frequenc

NEGATIVE NEGATIVE

The ADEThe ADE

have ahav

wrwr

T 2.00 MAX m}$% 0.55 E 0.95 aim w W E I. LANE “' 0.55 10 JEDEC SYANDARDS paws“: Nisan Shrmk Small omlmz Package [ssoP] (R5720) Drmenxmn: shown in millimerers Temperature Range Package Description +85°C +85°C Shrink Small Oml'me Package Shrink SmaH Oml‘m Relelence Board

ADE7761

Rev. A | Page 25 of 28

OUTLINE DIMENSIONS

20 11

7.50

7.20

6.90

8.20

7.80

7.40

5.60

5.30

5.00

COPLANARITY

0.10

0.05 MIN

1.85

1.75

1.65

0.65

BSC

0.25

0.09

0.95

0.75

0.55

8°

4°

0°

2.00 MAX

0.38

0.22 SEATING

PLANE

COMPLIANT TO JEDEC STANDARDS MO-150AE

Figure 34. 20-Lead Shrink Small Outline Package [SSOP]

(RS-20)

Dimensions shown in millimeters

ORDERING GUIDE

Model Temperature Range Package Description Package Option

ADE7761ARS –40°C to +85°C Shrink Small Outline Package RS-20

ADE7761ARSRL –40°C to +85°C Shrink Small Outline Package RS-20

ADE7761ARS-REF Reference Board

OBSOLETE

0.95.95

0.755

0.55

ETE

0°0°

DS MO-150AEDS MO-150AE

all Outline Package [SSOP] ne Package [SSOP]

S-20)

hown in millimeters hown in millimeters

Package Descriptkage Descrip

Shrink Small OSma

Shrink SmaShrink Sma

ReferencReferenc

ADE7761

Rev. A | Page 26 of 28

DISCLAIMER

The ADE7761 provides pulse outputs—CF, F1, and F2—

intended to be used for the billing of active energy. Pulses are

generated at these outputs in two different situations.

Case 1: When the analog input V2P – V2N complies with the

conditions described in Figure 32, CF, F1, and F2 frequencies

are proportional to active power and can be used to bill active

energy.

Case 2: When the analog input V2P – V2N does not comply with

the conditions described in Figure 32, the ADE7761 does not

measure active energy, but a quantity proportional to kAh. This

quantity is used to generate pulses on the same CF, F1, and F2.

This situation is indicated when the FAULT pin is high.

Analog Devices Inc. cautions users of the ADE7761:

xBilling active energy in Case 1 is consistent with the

understanding of the quantity represented by pulses on

CF, F1, and F2 outputs (watt-hour).

xBilling active energy while the ADE7761 is in Case 2 must

be decided knowing that the entity measured by the

ADE7761 in this case is ampere-hour and not watt-hour.

Users should be aware of this limitation and decide if the

ADE7761 is appropriate for their application.

OBSOLETE

re-ho

e-h

his limitatiois limi

e for their applicate for their applic

ADE7761

Rev. A | Page 27 of 28

NOTES

OBSOLETE

ANALOG DEVICES www.ana|ng.cnm

ADE7761

Rev. A | Page 28 of 28

NOTES

registered trademarks are the property of their respective owners.

D04407–0–2/04(A)

OBSOLETE

ADE7761 Datasheet by Analog Devices Inc.

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