UT62256CPCL-70LL datasheet - Org. = 32Kx8 ;; Temp. ( J) = 0~70 ;; Voltage = 5V ;; Speed

Details, datasheet, quote on part number: UT62256CPCL-70LL
PartUT62256CPCL-70LL
CategoryMemory => SRAM => Async. SRAM
TitleLow Speed & Low Power
DescriptionOrg. = 32Kx8 ;; Temp. ( J) = 0~70 ;; Voltage = 5V ;; Speed (ns) = 35/70 ;; Icc(Max) (mA) = 40/30 ;; Isb1(Max) (uA) = 100/50 ;; Package = 28PDIP, 28SOP, 28STSOP, Die
CompanyUtron technology
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Features, Applications

REVISION Rev. 0.9 Rev. 1.0 DESCRIPTION Original. Revised - The test condition of ICC1 and ICC2 - Symbols CE#,OE# and WE# , OE and WE - The ordering information of package ,STSOP-1 is revised as STSOP. Revised - Improve IDR from to 10�A (LL-version , max.) - Package outline dimension Revised - Add Standby Current ISB1=20�A for special requirement ( LL-version , max. ) - Ordering information in Standby Current column ( maximum typical ) - Standby Current in FEATURES section : 3mA (typical) normal : 0.3mA (typical) normal - Cycle time condition in DC electrical characteristics : Tcycle=1ms Rev. Tcycle=1�s - Waveforms - Add under/overshoot range of VIL & VIH Add order information for lead free product DATE Apr. 26,2001 May. 14,2001

UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, O. C. TEL: 886-3-5777882 FAX: 886-3-5777919

The a 262,144-bit low power CMOS static random access memory organized as 32,768 words by 8 bits. It is fabricated using high performance, high reliability CMOS technology. The UT62256C is designed for high-speed and low power application. It is particularly well suited for battery back-up nonvolatile memory application. The UT62256C operates from a single 5V power supply and all inputs and outputs are fully TTL compatible

FEATURES

Access time : 35/70ns (max.) Low power consumption: Operating 40/30 mA (typical.) Standby : 0.3mA (typical) normal 2uA (typical) L-version 1uA (typical) LL-version Single 5V power supply All inputs and outputs are TTL compatible Fully static operation Three state outputs Data retention voltage : 2V (min.) Package 28-pin 600 mil PDIP 28-pin 330 mil SOP 28-pin 8mmx13.4mm STSOP

DESCRIPTION Address Inputs Data Inputs/Outputs Chip Enable Input Write Enable Input Output Enable Input Power Supply Ground

UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, O. C. TEL: 886-3-5777882 FAX: 886-3-5777919

SYMBOL VTERM TA TSTG PD IOUT Tsolder RATING -65 to UNIT mA �J

PARAMETER Terminal Voltage with Respect to VSS Operating Temperature Storage Temperature Power Dissipation DC Output Current Soldering Temperature (under 10 sec)

*Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.

MODE Standby Output Disable Read Write
SUPPLY CURRENT ISB, ISB1 ICC, ICC1, ICC2 ICC, ICC1, ICC2 ICC, ICC1, ICC2

PARAMETER SYMBOL TEST CONDITION *1 Input High Voltage VIH *2 Input Low Voltage VIL Input Leakage Current ILI VSS VIN VCC Output Leakage ILO VSS VI/O VCC Current CE =VIH OE = VIH WE = VIL Output High Voltage VOH IOH= - 1mA Output Low Voltage VOL IOL= 4mA Operating Power ICC CE = VIL , Supply Current II/O = 0mA ,Cycle=Min. = 0.2V; II/O = 0mA Tcycle other pins or =500ns Tcycle VCC-0.2V =1�s normal Standby Power ISB CE IH Supply Current CE VCC-0.2V ISB -L/-LL CE =VIH VCC-0.2V -L -LL Notes: 1. Overshoot : Vcc+2.0v for pulse width less than 10ns. 2. Undershoot : Vss-2.0v for pulse width less than 10ns. 3. Overshoot and Undershoot are sampled, not 100% tested. 4. ISB1=20�A for special requirement. MIN.

UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, O. C. TEL: 886-3-5777882 FAX: 886-3-5777919


 

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