PLL520-38-39 datasheet(1/7 Pages) PLL | PECL and LVDS Low Phase Noise VCXO (for 65-130MHz Fund Xtal)
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PLL520-38-39 Scheda tecnica(PDF) 1 Page - PhaseLink Corporation

Il numero della parte PLL520-38-39
Spiegazioni elettronici  PECL and LVDS Low Phase Noise VCXO (for 65-130MHz Fund Xtal)
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Produttore elettronici  PLL [PhaseLink Corporation]
Homepage  http://www.phaselink.com
Logo PLL - PhaseLink Corporation

PLL520-38-39 Scheda tecnica(HTML) 1 Page - PhaseLink Corporation

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PLL520-38/-39
PECL and LVDS Low Phase Noise VCXO (for 65-130MHz Fund Xtal)
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/20/04 Page 1
FEATURES
• 65MHz to 130MHz Fundamental Mode Crystal.
• Output range: 65MHz – 130MHz (no PLL).
• Low Injection Power for crystal 50uW.
• PECL (PLL520-38) or LVDS output (PLL520-39).
• Integrated variable capacitors.
• Supports 2.5V or 3.3V-Power Supply.
• Available in 16-Pin (TSSOP or 3x3 QFN).
DESCRIPTION
The PLL520-38/-39 is a family of VCXO IC’s
specifically designed to pull high frequency
fundamental crystals from 65MHz to 130MHz, with
selectable PECL or LVDS outputs.. They achieve
very low current into the crystal resulting in better
overall stability. Their internal varicaps allow an on
chip frequency pulling, controlled by the VCON
input. Their very low jitter makes them ideal for the
most demanding timing requirements.
BLOCK DIAGRAM
PIN CONFIGURATION
OUTPUT ENABLE LOGICAL LEVELS
Part #
OE
State
0
(Default)
Output enabled
PLL520-38
1
Tri-state
0
Tri-state
PLL520-39
1
(Default)
Output enabled
OE input: Logical states defined by PECL levels for PLL520-38
Logical states defined by CMOS levels for PLL520-39
1
2
3
4
5
6
7
8
VDD
9
10
11
12
13
14
15
16
XIN
XOUT
N/C
N/C
OE
VCON
GND
N/C
N/C
GND
CLKC
VDD
CLKT
N/C
N/C
XIN
XOUT
OE
Q
PLL520-38/-39
VCON
Q
Oscillator
Amplifier
w/
integrated
varicaps
P520-3x
GND
VDD
CLKT
CLKC
XOUT
XIN
N/C
OE
4
16
15
14
13
12
11
10
9
8
7
6
5
12
3


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