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PLL502-30DC Datasheet(PDF) 1 Page - PhaseLink Corporation |
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PLL502-30DC Datasheet(HTML) 1 Page - PhaseLink Corporation |
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1 / 8 page  PLL502-30 750kHz – 800MHz Low Phase Noise VCXO (for 12 – 25MHz Crystals) 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 01/20/06 Page 1 FEATURES • 750kHz to 800MHz output range. • Low phase noise output (@ 10kHz frequency offset, -142dBc/Hz for 19.44MHz, -125dBc/Hz for 155.52MHz, -115dBc/Hz for 622.08MHz). • Selectable CMOS, PECL and LVDS output. • Selectable High Drive or Standard CMOS. • 12 to 25MHz crystal input. • No external load capacitor or varicap required. • Output Enable selector. • Wide pull range (+/-200ppm) • 3.3V operation. • Available in DIE (65 mil x 62 mil). DESCRIPTION The PLL502-30 is a monolithic low jitter and low phase noise (-142dBc/Hz @ 10kHz offset) VCXO IC Die, with CMOS, LVDS and PECL output, covering the 750kHz to 800MHz output range. It allows the control of the output frequency with an input voltage (VCON), using a low cost crystal. The same die can be used as a VCXO with output frequencies ranging from FXIN / 16 to FXIN x 32 thanks to frequency selector pads. This makes the PLL502-30 ideal as a universal die for applications ranging from ADSL to SONET. DIE SPECIFICATIONS Name Value Size 62 x 65 mil Reverse side GND Pad dimensions 80 micron x 80 micron Thickness 10 mil BLOCK DIAGRAM DIE CONFIGURATION OUTPUT SELECTION AND ENABLE OUTSEL1 (Pad #18) OUTSEL0 (Pad #25) Selected Output 0 0 High Drive CMOS 0 1 Standard CMOS 1 0 PECL 1 1 LVDS OE_SELECT (Pad #9) OE_CTRL (Pad #30) State 0 (Default) Output enabled 0 1 Tri-state 0 Tri-state 1 (Default) 1 (Default) Output enabled Pad #9: Bond to GND to set to “0”, bond to VDD to set to “1” Pad #30: Logical states defined by PECL levels if OE_SELECT is “0” Logical states defined by CMOS levels if OE_SELECT is “1” 18 19 20 21 23 25 7 13 10 26 29 31 Y X (0,0) (1550,1475) 65 mil 24 22 17 16 15 14 12 11 9 8 6 1 234 5 27 28 30 OE_SEL^ GNDBUF CMOS LVDSB PECLB VDDBUF VDDBUF PECL LVDS XIN XOUT SEL2^ SEL3^ OE_CTRL VCON Die ID: A0505-18 C502A Note: ^ denotes internal pull up Reference Divider Phase Detector Charge Pump Loop Filter VCO VCO Divider XTAL OSC CLKBAR OE XIN XOUT CLK VCON VARICAP + SEL |
Similar Part No. - PLL502-30DC |
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Similar Description - PLL502-30DC |
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