Part | M11L16161A-50T |
Category | Memory => DRAM => EDO/FPM DRAM => 16 Mb |
Title | EDO DRAM |
Description | Org. = 1MbX16 ;; Description = Edo 3.3V Self Refresh ;; Refresh = 1K ;; Speed/ Clock Freq. = 45ns ;; Package = 44/50-TSOPII |
Company | EliteMT |
Datasheet | Download M11L16161A-50T Datasheet |
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Features, Applications |
FEATURES 42-pin 400mil SOJ 50-pin 400mil TSOP (TypeII) PRODUCT NO. M11L16161SA-45T/50T/60T * Ordered by special request Refresh Vcc Normal *SelfRefresh Normal SelfRefresh Normal *SelfRefresh Normal SelfRefresh 3.3V 5V TSOPII 3.3V 5V SOJ PACKING TYPE X16 organization EDO (Extended Data-Out) access mode 2 CAS Byte/Word Read/Write operation Single power supply � 10% Vcc for 5V product � 10% Vcc for 3.3V product Interface for inputs and outputs TTL-compatible for 5V products LVTTL-compatible for 3.3V products 1024-cycle refresh in 16ms Refresh modes : RAS only, CAS BEFORE RAS (CBR) and HIDDEN capabilities, Optional self-Refresh capabilities(S-ver. Only) JEDEC standard pinout Key AC Parameter -50 -60 tRAC 50 60 tCAC 13 15 tRC 84 104 tPC 20 25 The M11B16161/M11L16161 series is a randomly accessed solid state memory, organized x 16 bits device. It offers Extended Data-Output access mode. Single power supply � 10%), access time (-45,-50,-60), selfrefresh function and package type (SOJ, TSOP II) are optional features of this family. All these family have CAS - before RAS , RAS -only refresh and Hidden refresh. Two access modes are supported by this device : Byte access and Word access. Use only one of the two CAS and leave the other staying high will result in a BYTE access. WORD access happens when two CAS ( CASL , CASH ) are used. CASL transiting low during READ or WRITE cycle will output or input data into the lower byte (IO0~IO7), and CASH transiting low will output or input data into the upper byte (IO8~15). PIN NO. (SOJ Package) PIN NAME TYPE DESCRIPTION Address Input Row Address : A0~A9 Column Address : A0~A9 Row Address Strobe Column Address Strobe / Upper Byte Control Column Address Strobe / Lower Byte Control Write Enable Output Enable Data Input / Output Power, or 3.3V) Ground No Connect Voltage on Any pin Relative to Vss to +4.6V Operating Temperature, +70 �C Storage Temperature +150 �C Power Dissipation.......................................1.0W Short Circuit Output Current........................50mA Permanent device damage may occur if "Absolute Maximum Ratings" are exceeded. This is a stress rating only, and functional operation of the device above those conditions indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. PARAMETER Supply Voltage Supply Voltage Input High Voltage Input Low Voltage Input Leakage Current Output Leakage Current Output High Voltage Output Low Voltage 0V VIN VIH(max) 0V VOUT VCC Output(s) disable 5V IOH mA 3.3V IOH mA 5V IOL mA 3.3V IOL 2 mA CONDITIONS SYMBOL MIN VCC VSS VIH VIL ILI ILO VOH VOL 3.3V MAX 3.6 0 VCC MIN 5V MAX 5.5 0 VCC �A UNITS NOTES tRC = min tPC = min tRC = min Standby with CBR refresh, tRC = 62.4us tRAS 300ns, DOUT =Hi-Z, CMOS interface CAS Before RAS Refresh Current Battery Backup Current (S-ver. Only)Note : 1. ICC max is specified at the output open condition. 2. Address can be changed twice or less while RAS =VIL. 3. Address can be changed once or less while CAS =VIH. Elite Semiconductor Memory Technology Inc. |
Related products with the same datasheet |
M11L16161A-45J |
M11L16161A-45T |
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M11L16161SA |
M11L16161SA-45J |
M11L16161SA-45T |
M11L16161SA-50J |
M11L16161SA-50T |
M11L16161SA-60J |
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