K3P5V1000D-GC datasheet - Description = K3P5V1000D / K3P5U1000D 16M-Bit (2Mx8

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Part	K3P5V1000D-GC
Category	Memory => ROM => Mask ROM => Pagemode
Title	16M bit
Description	Description = K3P5V1000D / K3P5U1000D 16M-Bit (2Mx8 /1Mx16) CMOS Mask ROM ;; Organization = 2Mx8,1Mx16 ;; Voltage(V) = 3.3 ;; Speed(ns) = 100/30ns(Max.)@CL=100pF ;; Package = 42DIP,44SOP ;; Current (mA/uA) = 60/30 ;; Production Status = Mass Production ;; Comments = Eol BY June 2003
Company	Samsung Semiconductor, Inc.
Datasheet	Download K3P5V1000D-GC Datasheet
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Features, Applications

FEATURES

Switchable organization x 8(byte mode) x 16(word mode) Fast access time Random Access : 100ns(Max.) Page Access 30ns(Max.) 8 Words / 16 Bytes page access Supply voltage : single +3.0V/ single +3.3V Current consumption Operating : 60mA(Max.) Standby : 30�A(Max.) Fully static operation All inputs and outputs TTL compatible Three state outputs Package : 44-SOP-600

The is a fully static mask programmable ROM fabricated using silicon gate CMOS process technology, and is organized either x 8 bit(byte mode) x 16 bit(word mode) depending on BHE voltage level.(See mode selection table) This device includes page read mode function, page read mode allows 8 words (or 16 bytes) of data to read fast in the same page, CE and ~ A19 should not be changed. This device operates with or 3.3V power supply, and all inputs and outputs are TTL compatible. Because of its asynchronous operation, it requires no external clock assuring extremely easy operation. It is suitable for use in program memory of microprocessor, and data memory, character generator. The K3P5V(U)1000D-DC is packaged a 42-DIP and the a 44-SOP.

Pin Function Page Address Inputs Address Inputs Data Outputs Output 15(Word mode)/ LSB Address(Byte mode) Word/Byte selection Chip Enable Output Enable Power Ground No Connection

Item Voltage on Any Pin Relative to VSS Temperature Under Bias Storage Temperature Symbol VIN TBIAS TStg Rating

NOTE : Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Item Supply Voltage Supply Voltage Symbol VCC VSS Min 2.7/3.0 0 Typ 3.0/3.3 0 Max 3.3/3.6 0 Unit V

Parameter Operating Current Standby Current(TTL) Standby Current(CMOS) Input Leakage Current Output Leakage Current Input High Voltage, All Inputs Input Low Voltage, All Inputs Output High Voltage Level Output Low Voltage Level Symbol ICC ISB1 ISB2 ILI ILO VIH VIL VOH VOL IOH=-400�A IOL=2.1mA Test Conditions Cycle=5MHz, all outputs open, CE=OE=VIL, to 2.4V (AC Test Condition) CE=VIH, all outputs open CE=VCC, all outputs open VIN=0 to VCC VCC=3.3V�0.3V VCC=3.0V�0.3V Min Max 0.6 0.4 Unit mA �A

NOTE : Minimum DC Voltage(V IL) -0.3V an input pins. During transitions, this level may undershoot to -2.0V for periods <20ns. Maximum DC voltage on input pins(VIH) V CC+0.3V which, during transitions, may overshoot to VCC+2.0V for periods <20ns.

L OE Input Operating BHE Q15/A-1 X Output Mode Standby Operating Data High-Z Q0~Q15 : Dout Q0~Q7 : Dout Q8~Q14 : Hi-Z Power Standby Active

Item Output Capacitance Input Capacitance Symbol COUT CIN Test Conditions VOUT=0V VIN=0V Min Max 12 Unit pF

Item Input Pulse Levels Input Rise and Fall Times Input and Output timing Levels Output Loads Value

Item Read Cycle Time Chip Enable Access Time Address Access Time Page Address Access Time Output Enable Access Time Output or Chip Disable to Output High-Z Output Hold from Address Change

NOTE : Page Address is determined as below. Word mode (BHE=VIH) A1, A2 Byte mode (BHE=VIL) A1, A2

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