IL5851N datasheet -

Details, datasheet, quote on part number: IL5851N
PartIL5851N
CategoryCommunication => Telephony
TitleTone/Pulse Dialers
Description
CompanyIK Semiconductor
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Features, Applications

The is a monolithic CMOS integrated circuit which uses an inexpensive RC oscillator for its frequency reference and provides all the features required for implementing a pulse dialer with 32 digit redial. Wide operating voltage range (2.0~6.0V) Low power dissipation Use either a standard of 7 matrix keyboard with negative true common or the inexpensive form A-type keyboard Make/Break ratio can be selected Redial with * or Continuous MUTE Power up clear circuitry on chip 10 pps/20 pps can be selected

NAME VCC PIN 1 Positive supply pin. The voltage on this pin is measured relative to Pin 6 and is supplied from a 150�A current source. This voltage should be regulated to less than 6.0 volts using on external form or regulation. VREF 2 The VREF output provides reference voltage that tracks internal parameters of the IN5851N. VREF provides a negative voltage reference to the VCC supply. Its magnitude will be approximately 0.6 volt higher than the minimum operating voltage of each particular IN5851N. The typical application would be to connect the VREF pin to the GND pin (Pin 6). The supply to the VCC pin (Pin 1) should then be regulated to 150�A (IOP max). with this amount of supply current, operation of the IN5851N is guaranteed. The internal circuit of the VREF function is shown in Figure 1 with its associated I-V characteristic 14,15,16 Col1-Col4 Keyboard inputs. The IN5851N incorporates an innovative keyboard scheme that allows either the standard 2-of-7 keyboard with negative common or the inexpensive single contact (form A) keyboard to be used. A valid key entry is defined by either a single row being connected to a single column or GND being simultaneously presented to both a single row and column. When in the on-hook mode, the row and column inputs are held high and no keyboard inputs are accepted. When off-hook, the keyboard is completely static until the initial valid key input is sensed. The oscillator is then enabled and the rows and columns are scanned alternately (pulled high, then low) to verify the varied input. The input must remain valid for 10msec of debounce time to be accepted. Form A type keyboard of 7 keyboard (negative common).

DESCRIPTION

pin is connected to the common part in general applications. RC1-RC3 7,8,9 Oscillator The IN5851N contains on-chip inverters to provide oscillator which will operate with a minimum external components. Following figure shows the on-chip configuration with the necessary external components. Optimum stability occurs with the ration K=RS/R equal to 10 The oscillator period is given by: + 0.5)) Where CS is the stray capacitance on Pin 7. Accuracy and stability will be enhanced with this capacitance minimized.

10/20pps Select Connecting this pin to GND (pin 6) will select an output pulse rate of 10pps. Connecting the pin VCC (pin 1) will select an output pulse rate of 20pps.

Make/break Select The Make/Break pin controls the Make/Break ratio of the pulse output. The make/Break ratio is controlled by connection VCC or GND to this pin as shown in the following table. Input VCC (Pin1) GND(PIn 6) Make 33.4% 40% Break 66.6% 60%

Mute Output The mute output is an open-drain N-Channel transistor designed to drive external bipolar transistor. This circuitry is usually used to mute the receiver during outpulsing. As shown in Fig. 2 the IN5851N mute output turns on (pulls to the VGND-supply) at the beginning of the predigital pause and turns off (goes to an open circuit) following the last break. The delay from the end of the last break until the mute output turns off is mute overlap and is specified as tMO.

ON-HOOK/TEST This pin detects the state of the hook switch contact "OFF HOOK" corresponds to VSS condition. �N HOOK"corresponds to VDD condition. When outpulsing in this mode, which can 300msec, is completed, the circuit is deactivated and will require current only necessary to sustain the memory and power-up-clear detect circuitry (refer to the electrical specifications).


 

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