IC42S8200-7TI datasheet(33/76 Pages) ICSI | 1Meg x 8 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM

Part No.	IC42S8200-7TI

Description	1Meg x 8 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM

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Manufacturer	ICSI [Integrated Circuit Solution Inc]

Direct Link	http://www.icsi.com.tw

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Integrated Circuit Solution Inc.

33

DR018-0A 07/10/2001

Write Cycle (.ull Page) Interruption Using

the Burst Stop Command

The IC42S8200 can input data continuously from the burst

start address (a) to location a+255 during a write cycle in

which the burst length is set to full page. The IC42S8200

repeats the operation starting at the 256th cycle with data

input returning to location (a) and continuing with a+1, a+2,

a+3, etc. A burst stop command must be executed to

terminate this cycle. A precharge command must be

executed within the ACT to PRE command period (tRAS

max.) following the burst stop command. After the period

(tWBD) required for burst data input to stop following the

execution of the burst stop command has elapsed, the

write cycle terminates. This period (tWBD) is zero clock

cycles, regardless of the CAS latency.

CAS latency = 2, burst length = 4

Burst Data Interruption Using the

DQM Pins (Read Cycle)

Burst data output can be temporarily interrupted (masked)

during a read cycle using the DQM pin. Regardless of the

CAS latency, two clock cycles (tQMD) after the DQM pins

goes HIGH, the corresponding outputs go to the HIGH

impedancestate.Subsequently,theoutputsaremaintained

in the high impedance state as long as that DQM pin

remains HIGH. When the DQM pin goes LOW, output is

resumed at a time tQMD later.

Since the DQM pin control the device output buffers only,

the read cycle continues internally and, in particular,

incrementing of the internal burst counter continues.

CAS latency = 2, 3, burst length = full page

WRITE A0

COMMAND

I/O

CLK

DIN A0

DIN A1

DIN ADIN A1

DIN A2

tWBD=0

tRP

READ (CA=A, BANK 0)

BURST STOP

BST

PRE 0

INVALID DATA

PRECHARGE (BANK 0)

Don’t Care

READ A0

COMMAND

DQM

I/O0-I/O7

CLK

DOUT A0

tQMD=2

HI-Z

READ (CA=A, BANK 0)

DATA MASK

DOUT A2

DOUT A3

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IC42S8200-7TI Datasheet(PDF) 33 Page - Integrated Circuit Solution Inc

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