FQI13N50 datasheet - 500V N-channel Mosfet

Details, datasheet, quote on part number: FQI13N50
PartFQI13N50
Category
Description500V N-channel Mosfet
CompanyFairchild Semiconductor
DatasheetDownload FQI13N50 Datasheet
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Features, Applications

These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, planar stripe, DMOS technology. This advanced technology is especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficiency switch mode power supply, power factor correction, and electronic lamp ballast based on half bridge. D

Features

12.5A, 500V. RDS(on) = 0.43 @VGS 10 V Low gate charge ( typical 45 nC). Low Crss ( typical 25 pF). Fast switching. 100% avalanche tested. Improved dv/dt capability.

Parameter Drain-Source Voltage - Continuous (TC = 25�C) Drain Current - Continuous (TC = 100�C) Drain Current - Pulsed

Gate-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TA 25�C) *

Power Dissipation (TC 25�C) - Derate above 25�C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds

Symbol RJC RJA Parameter Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient * Thermal Resistance, Junction-to-Ambient Typ ---Max 40 62.5 Units �C/W

* When mounted on the minimum pad size recommended (PCB Mount)

BVDSS / TJ IDSS IGSSF IGSSR Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward Gate-Body Leakage Current, Reverse VGS = 250 �A, Referenced to 25�C VDS 500 V, VGS 0 V VDS = 125�C VGS 30 V, VDS 0 V VGS -30 V, VDS V/�C �A nA

VGS(th) RDS(on) gFS Gate Threshold Voltage Static Drain-Source On-Resistance Forward Transconductance VDS = VGS, 250 �A VGS 6.25 A VDS 6.25 A

Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS 25 V, VGS = 1.0 MHz pF

td(on) tr td(off) tf Qg Qgs Qgd Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDS 13.4 A, VGS 10 V

IS ISM VSD trr Qrr Maximum Continuous Drain-Source Diode Forward Current Maximum Pulsed Drain-Source Diode Forward Current VGS 12.5 A Drain-Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS 13.4 A, dIF = 100 A/�s

Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature = 9.3mH, IAS = 12.5A, VDD 25 , Starting 25�C 3. ISD 13.4A, di/dt 200A/�s, VDD BVDSS, Starting 25�C 4. Pulse Test : Pulse width 300�s, Duty cycle 2% 5. Essentially independent of operating temperature


Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature


 

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