CS2841B Datasheet by ON Semiconductor | Digi-Key Electronics

CS2841B Datasheet by ON Semiconductor

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© Semiconductor Components Industries, LLC, 2008
March, 2008 - Rev. 8
1Publication Order Number:
CS2841B/D
CS2841B
Automotive Current Mode
PWM Control Circuit
The CS2841B provides all the necessary features to implement
off-line fixed frequency current-mode control with a minimum
number of external components.
The CS2841B (a variation of the CS2843A) is designed specifically
for use in automotive operation. The low start threshold voltage of 8.0 V
(typ), and the ability to survive 40 V automotive load dump transients
are important for automotive subsystem designs. The CS2841 series
has a history of quality and reliability in automotive applications.
The CS2841B incorporates a precision temperature-controlled
oscillator with an internally trimmed discharge current to minimize
variations in frequency. Duty-cycles greater than 50% are also
possible. On board logic ensures that VREF is stabilized before the
output stage is enabled. Ion implant resistors provide tighter control of
undervoltage lockout.
Features
Optimized for Off-Line Control
Internally Trimmed Temperature Compensated Oscillator
Maximum Duty-Cycle Clamp
VREF Stabilized Before Output Stage Enabled
Low Start-Up Current
Pulse-By-Pulse Current Limiting
Improved Undervoltage Lockout
Double Pulse Suppression
1.0 % Trimmed Bandgap Reference
High Current Totem Pole Output
Pb-Free Packages are Available*
*For additional information on our Pb-Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
CS2841B = Device Code
A = Assembly Location
WL = Wafer Lot
YY, Y = Year
WW = Work Week
G = Pb-Free Package
PDIP-8
N SUFFIX
CASE 626
PIN CONNECTIONS AND
MARKING DIAGRAM
VREF
VCC
VOUT
GND
COMP
VFB
Sense
OSC
1
8
SOIC-14
D SUFFIX
CASE 751A
GND
OSC
PWR GND
NC
VOUT
Sense
VCC PWR
NC
VCC
VFB
NC
NC
VREF
COMP
1
14
SOIC-14
PDIP-8
http://onsemi.com
CS2841BEB
AWL
YYWWG
CS2841BD14G
AWLYWW
1
14
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
ORDERING INFORMATION
Error Amphher
CS2841B
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2
Figure 1. Block Diagram
+
-
Oscillator
Set/
Reset
Undervoltage
Lockout Circuit
8.0 V/7.4 V
2.5 V
5.0 V
Reference
Internal
Bias
Output
Enable
Error
Amplifier
VC
2 R
R1.0 V
S
R
Current
Sensing
Comparator
PWM
Latch
NOR
VCC
GND
OSC
VFB
COMP
Sense
VCC Pwr
VREF
VOUT
Pwr GND
MAXIMUM RATINGS
Rating Value Unit
Supply Voltage (Low Impedance Source) 40 V
Output Current ±1.0 A
Output Energy (Capacitive Load) 5.0 mJ
Analog Inputs (VFB, Sense) -0.3 to 5.5 V
Error Amp Output Sink Current 10 mA
Lead Temperature Soldering Wave Solder (through hole styles only) Note 1
Reflow (SMD styles only) Note 2
260 peak
230 peak
°C
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. 10 seconds max
2. 60 seconds max above 183°C
ORDERING INFORMATION
Device Package Shipping
CS2841BEBN8 PDIP-8 50 Units / Rail
CS2841BEBN8G PDIP-8
(Pb-Free)
50 Units / Rail
CS2841BED14 SOIC-14 55 Units / Rail
CS2841BED14G SOIC-14
(Pb-Free)
55 Units / Rail
CS2841BEDR14 SOIC-14 2500 / Tape & Reel
CS2841BEDR14G SOIC-14
(Pb-Free)
2500 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
AVCOMP
CS2841B
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3
ELECTRICAL CHARACTERISTICS (-40°C TA 85°C, RT = 680 kW, CT = 0.022 mF for Triangular Mode, VCC = 15 V (Note 3),
RT = 10 kW, CT = 3.3 nF for Sawtooth Mode (see Figure 7); unless otherwise specified.)
Characteristic Test Conditions Min Typ Max Unit
Reference Section
Output Voltage TJ = 25°C, IOUT = 1.0 mA 4.9 5.0 5.1 V
Line Regulation 8.4 VCC 16 V - 6.0 20 mV
Load Regulation 1.0 IOUT 20 mA - 6.0 25 mV
Temperature Stability Note 4 - 0.2 0.4 mV/°C
Total Output Variation Line, Load, Temp. Note 4 4.82 - 5.18 V
Output Noise Voltage 10 Hz f 10 kHz, TJ = 25°C. Note 4 - 50 - mV
Long Term Stability TA = 125°C, 1000 Hrs. Note 4 - 5.0 25 mV
Output Short Circuit TA = 25°C -30 -100 -180 mA
Oscillator Section
Initial Accuracy Sawtooth Mode: TJ = 25°C. See Figure 7.
Sawtooth Mode: -40°C TA +85°C
Triangular Mode: TJ =25°C. See Figure 7.
47
44
44
52
52
52
57
60
60
kHz
kHz
kHz
Voltage Stability 8.4 VCC 16 V - 0.2 1.0 %
Temperature Stability Sawtooth Mode: TMIN TA TMAX. Note 4
Triangular Mode: TMIN TA TMAX. Note 4
-
-
5.0
8.0
-
-
%
%
Amplitude VOSC (Peak to Peak) - 1.7 - V
Discharge Current TJ = 25°C
TMIN TA TMAX
7.4
7.2
8.3
-
9.2
9.4
mA
mA
Error Amp Section
Input Voltage VCOMP = 2.5 V 2.42 2.5 2.58 V
Input Bias Current VFB = 0 V - -0.3 -2.0 mA
AVOL 2.0 VOUT 4.0 V 65 90 - dB
Unity Gain Bandwidth Note 4 0.7 1.0 - MHz
PSRR 8.4 V VCC 16 V 60 70 - dB
Output Sink Current VFB = 2.7 V, VCOMP = 1.1 V 2.0 6.0 - mA
Output Source Current VFB = 2.3 V, VCOMP = 5.0 V -0.5 -0.8 - mA
VOUT High VFB = 2.3 V, RL = 15 kW to Ground 5.0 6.0 - V
VOUT Low VFB = 2.7 V, RL = 15 kW to VREF - 0.7 1.1 V
Current Sense Section
Gain Notes 5 and 6 2.85 3.0 3.15 V/V
Maximum Input Signal VCOMP = 5.0 V. Note 5 0.9 1.0 1.1 V
PSRR 12 V VCC 25 V. Note 5 - 70 - dB
Input Bias Current VSense = 0 V - -2.0 -10 mA
Delay to Output TJ = 25°C. Note 4 - 150 300 ns
3. Adjust VCC above the start threshold before setting at 15 V
4. These parameters, although guaranteed, are not 100% tested in production
5. Parameter measured at trip point of latch with VFB = 0
6. Gain defined as:
A+DVCOMP
DVSense ; 0 vVSense v0.8V.
CS2841B
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4
ELECTRICAL CHARACTERISTICS (-40°C TA 85°C, RT = 680 kW, CT = 0.022 mF for Triangular Mode, VCC = 15 V (Note 3),
RT = 10 kW, CT = 3.3 nF for Sawtooth Mode (see Figure 7); unless otherwise specified.)
Characteristic UnitMaxTypMinTest Conditions
Output Section
Output Low Level ISINK = 20 mA
ISINK = 200 mA
-
-
0.1
1.5
0.4
2.2
V
V
Output High Level ISOURCE = 20 mA
ISOURCE = 200 mA
13
12
13.5
13.5
-
-
V
V
Rise Time TJ = 25°C, CL = 1.0 nF. Note 7 - 50 150 ns
Fall Time TJ = 25°C, CL = 1.0 nF. Note 7 - 50 150 ns
Output Leakage Undervoltage Active, VOUT = 0 - -0.01 -10 mA
Total Standby Current
Startup Current - - 0.5 1.0 mA
Operating Supply Current ICC VFB = VSense = 0 V, RT = 10 kW, CT = 3.3 nF -11 17 mA
Undervoltage Lockout Section
Start Threshold - 7.6 8.0 8.4 V
Min. Operating Voltage After Turn On 7.0 7.4 7.8 V
7. These parameters, although guaranteed, are not 100% tested in production.
PACKAGE PIN DESCRIPTION
PACKAGE PIN #
PIN SYMBOL FUNCTION
PDIP-8 SOIC-14
1 1 COMP Error Amp Output, Used to Compensate Error Amplifier
2 3 VFB Error Amp Inverting Input
3 5 Sense Noninverting Input to Current Sense Comparator
4 7 OSC Oscillator Timing Network with Capacitor to Ground, Resistor to VREF
5 8 GND Ground
9Pwr GND Output Driver Ground
6 10 VOUT Output Drive Pin
11 VCC Pwr Output Driver Positive Supply
7 12 VCC Positive Power Supply
8 14 VREF Output of 5.0 V Internal Reference
2, 4, 6, 13 NC No Connection
RT : 680 :2 RT: 15 ks: % O 4‘ x ErrorAmp VFE Vcc Adlus‘ 5525415 5 0 k£2 Sense Sense vOUT 4.7 m Adwst ? osc GND H 0 CT ___ Figure 4. Test Circuit hltp://onsemi.com 5
CS2841B
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5
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 2. Oscillator Frequency vs. CTFigure 3. Oscillator Duty Cycle vs. RT
900
800
700
600
500
Frequency (kHz)
.0005 .001 .002 .04 .05
CT (mF)
400
300
200
100
.03.02.01.003 .005
RT = 680 W
RT = 1.5 kW
RT = 10 kW
100
90
80
70
50
Duty Cycle (%)
RT (W)
40
30
20
10
60
100
200
300
400
500
700
1 k
2 k
3 k
4 k
5 k
7 k
10 k
Figure 4. Test Circuit
VREF
VCC
VOUT
GND
COMP
VFB
Sense
OSC
CS2841B
RT
4.7 kW
4.7 kW
1.0 kW
Error Amp
Adjust
2N2222
100 kW
5.0 kW
Sense
Adjust
CT
0.1 mF
0.1 mF1.0 kW
1.0 W
A
VREF
VCC
VOUT
GND
<15ma>
CS2841B
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6
CIRCUIT DESCRIPTION
Undervoltage Lockout
During Undervoltage Lockout (Figure 5), the output
driver is biased to a high impedance state. The output should
be shunted to ground with a resistor to prevent output
leakage current from activating the power switch.
Figure 5. Typical Undervoltage Characteristics
ON/OFF Command
to Reset of IC
VCC
VON = 8.0 V
VOFF = 7.4 V
VCC
ICC
7.4 V 8.0 V
< 15 mA
< 1.0 mA
PWM Waveform
To generate the PWM waveform, the control voltage from
the error amplifier is compared to a current sense signal
representing the peak output inductor current (Figure 6). An
increase in VCC causes the inductor current slope to
increase, thus reducing the duty cycle. This is an inherent
feed-forward characteristic of current mode control, since
the control voltage does not have to change during changes
of input supply voltage.
Figure 6. Timing Diagram for Key CS2841B
Parameters
Switch
Current
EA Output
VCC
IO
VO
OSC
RESET
OSC
When the power supply sees a sudden large output current
increase, the control voltage will increase allowing the duty
cycle to momentarily increase. Since the duty cycle tends to
exceed the maximum allowed to prevent transformer
saturation in some power supplies, the internal oscillator
waveform provides the maximum duty cycle clamp as
programmed by the selection of OSC components.
Figure 7. Oscillator Timing Network and
Parameters
Internal Clock
Triangular Mode
VOSC
VOSC
Internal Clock
Small RT ( 700 kW)
Large RT ( 10 kW)
Sawtooth Mode
Timing Parameters
Vupper
Vlower
tctd
VREF
OSC
GND
RT
CT
Setting the Oscillator
Oscillator timing capacitor, CT, is charged by VREF
through RT and discharged by an internal current source.
During the discharge time, the internal clock signal blanks
out the output to the Low state, thus providing a user selected
maximum duty cycle clamp. Charge and discharge times are
determined by the general formulas:
IOHF Cm 0,1 HF]: hltp://onsemi.com 7
CS2841B
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7
tc+RTCTlnǒVREF *Vlower
VREF *VupperǓ
td+RTCTlnǒVREF *IdRT*Vupper
VREF *IdRT*VlowerǓ
Substituting in typical values for the parameters in the
above formulas:
VREF +5.0V
Vupper +2.7V
Vlower +1.0V
Id+8.3mA
tc[0.5534RTCT
td+RTCTlnǒ2.3 *0.0083RT
4.0 *0.0083RTǓ
The frequency and maximum duty cycle can be
determined from the Typical Performance Characteristic
graphs.
Grounding
High peak currents associated with capacitive loads
necessitate careful grounding techniques. Timing and
bypass capacitors should be connected close to GND pin in
a single point ground.
The transistor and 5.0 kW potentiometer are used to
sample the oscillator waveform and apply an adjustable
ramp to Sense.
C8
VC
C10
0.1 mF
10 mF0.1 mF
C9
C13
4.7 nF
OSC
VREF
VCC PVCC
VOUT
SENSE
COMP
VFB
GND PGND
R8
4.99 k
1.0 %
C14
47 pF
R7
22.1 k
C11
0.33 mF
R6
1.0 k
R4
10
C12
10 nF
R3
4.99 k
1.0 %
MTDISN06VTL4
R9
0.2
1.0 %
Q2
VPR
GND
Q1
2n4401
DZ1
13 V
1N5243B
R1
4.7 k
C1
68 mF68 mF
C2
C3
4.7 pF
100 V
MURS120T3
D1
R2
47
VCC
VCC-GND
0.1 mF
C7
1000 mF
C5
1000 mF
C6
C4
0.1 mF
D2 MBR360 L1 2.2 mH
9T
VCC = 5.0 V @ 750 mA
R5
2.0 k
CS2841B
20T
Figure 8. Flyback Application
OSC 0 CC R3 (IE: MTP12NIO VouT 10 R5 SENSE woo COMP _]_C7 R6 R7 10k in 1Nsaia InputVoka Output Voltag Figure 9. Boos! Application hitp://onsemi.com a
CS2841B
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8
Figure 9. Boost Application
C4
C6
0.1 mF
10 mF0.1 mF
C5
C9
470 pF
OSC
VREF
VCC
VOUT
SENSE
COMP
FB
GND
R8
2.0 k C8
1.0 nF
R5
100
R3
10
C7
MTP12N10
R7
1.0
Q1
VPR
GND
1N5818
R2
10
C1
R1
100 V
D2
17 V
D1 1N5818
L1
100 mH
Input Voltage Range: 8.0 V to 16 V
Output Voltage: 17 V @ 100 mA > 300 mA
R4
3.0 k
CS2841B
0.01 mF
R6
10 k
100 mF
12 k
C3
C2 0.1 mF
330 mF
PACKAGE THERMAL DATA
Parameter PDIP-8 SOIC-14 Unit
RqJC Typical 52 30 °C/W
RqJA Typical 100 125 °C/W
um: 2 IMIEE
CS2841B
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9
PACKAGE DIMENSIONS
PDIP-8
CASE 626-05
ISSUE L
NOTES:
1. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
2. PACKAGE CONTOUR OPTIONAL (ROUND OR
SQUARE CORNERS).
3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
14
58
F
NOTE 2 -A-
-B-
-T-
SEATING
PLANE
H
J
G
DK
N
C
L
M
M
A
M
0.13 (0.005) B M
T
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A9.40 10.16 0.370 0.400
B6.10 6.60 0.240 0.260
C3.94 4.45 0.155 0.175
D0.38 0.51 0.015 0.020
F1.02 1.78 0.040 0.070
G2.54 BSC 0.100 BSC
H0.76 1.27 0.030 0.050
J0.20 0.30 0.008 0.012
K2.92 3.43 0.115 0.135
L7.62 BSC 0.300 BSC
M--- 10 --- 10
N0.76 1.01 0.030 0.040
__
1—1 2 conOLLINs DIMENSION MILLIMEIER HiFIiHiHiHiHiH a DIMENSIONSAANDBDO NOTINCLUDE MOLD PROTRUSION o MAXIMUM MOLD PROTRUSIDN u 15 In DOS) FER SIDE 5 DIMENSION D DoES NOT INCLUDE DAMBAR FRDTRUSION ALLOWABLE DIMENSION AI MAXIMuM MAIERIAL coNDIIIoN O DAMBAR FROTRuSIoN SHALL BE D I27 In ousI mIAL IN EXCESS oE THE D LI‘LI‘LLLHLIIi Sermccmiuctnv m J
CS2841B
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10
PACKAGE DIMENSIONS
SOIC-14
CASE 751A-03
ISSUE J
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.127
(0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
-A-
-B-
G
P7 PL
14 8
7
1
M
0.25 (0.010) B M
S
B
M
0.25 (0.010) A S
T
-T-
F
RX 45
SEATING
PLANE D14 PL K
C
J
M
_DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A8.55 8.75 0.337 0.344
B3.80 4.00 0.150 0.157
C1.35 1.75 0.054 0.068
D0.35 0.49 0.014 0.019
F0.40 1.25 0.016 0.049
G1.27 BSC 0.050 BSC
J0.19 0.25 0.008 0.009
K0.10 0.25 0.004 0.009
M0 7 0 7
P5.80 6.20 0.228 0.244
R0.25 0.50 0.010 0.019
__ __
7.04
14X
0.58
14X
1.52
1.27
DIMENSIONS: MILLIMETERS
1
PITCH
SOLDERING FOOTPRINT
7X
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
CS2841B/D
PUBLICATION ORDERING INFORMATION
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 USA/Canada
Europe, Middle East and Africa Technical Support:
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Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada
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Email: orderlit@onsemi.com
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For additional information, please contact your local
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