74ALVCH16501 Datasheet by Nexperia USA Inc.

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74ALVCH16501

18-bit universal bus transceiver; 3-state

Rev. 6 — 13 March 2019 Product data sheet

1. General description

The 74ALVCH16501 is an 18-bit transceiver featuring non-inverting 3-state bus compatible outputs

in both send and receive directions. Data flow in each direction is controlled by output enable

(OEAB and OEBA), latch enable (LEAB and LEBA), and clock (CPAB and CPBA) inputs. For

A-to-B data flow, the device operates in the transparent mode when LEAB is HIGH. When LEAB

is LOW, the A data is latched if CPAB is held at a HIGH or LOW logic level. If LEAB is LOW, the

A-bus data is stored in the latch/flip-flop on the LOW-to-HIGH transition of CPAB. When OEAB is

HIGH, the outputs are active. When OEAB is LOW, the outputs are in the high-impedance state.

Data flow for B-to-A is similar to that of A-to-B but uses OEBA, LEBA and CPBA. The output

enables are complimentary (OEAB is active HIGH, and OEBA is active LOW.

To ensure the high-impedance state during power-up or power-down, OEBA should be tied to

VCC through a pull-up resistor and OEAB should be tied to GND through a pull-down resistor; the

minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the

driver.

Active bus hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

2. Features and benefits

•Wide supply voltage range from 1.2 V to 3.6 V

•Complies with JEDEC standard JESD8-B

•CMOS low power consumption

•Direct interface with TTL levels

•Current drive ±24 mA at VCC = 3.0 V

•Universal bus transceiver with D-type latches and D-type flip-flops capable of operating in

transparent, latched or clocked mode

•All inputs have bus hold circuitry

•Output drive capability 50 Ω transmission lines at 85 °C

•3-state non-inverting outputs for bus-oriented applications

3. Ordering information

Table 1. Ordering information

PackageType number

Temperature range Name Description Version

74ALVCH16501DGG -40 °C to +85 °C TSSOP56 plastic thin shrink small outline package;

56 leads; body width 6.1 mm

SOT364-1

74ALVCH16501 Au BU A B A3 53 A4 A8 BE A7 B7 A9 59 Am Em AQ EQ Aw Em A15 m5 Am Em L OEAE LEAB OEEA LEEA “ W

Nexperia 74ALVCH16501

18-bit universal bus transceiver; 3-state

4. Functional diagram

001aal718

3 54

5 52

6 51

8 49

9 48

10 47

12 45

13 44

14 43

15 42

A10

16 41

B10

A11

17 40

B11

A12

19 38

B12

A13

20 37

B13

A14

21 36

B14

A15

23 34

B15

A16

24 33

B16

A17

26 31

B17

OEAB

1 27

OEBA

LEAB

2 28

LEBA

CPAB

55 30

CPBA

Fig. 1. Logic symbol

001aal717

OEAB

OEBA

CPAB

LEAB

CPBA

LEBA

A0 3D 1 1

4 1 6D

54 B0

A1 52 B1

A2 51 B2

A3 49 B3

A4 48 B4

A5 47 B5

A6 45 B6

A7 44 B7

A8 43 B8

A9 42 B9

A10 41 B10

A11 40 B11

A12 38 B12

A13 37 B13

A14 36 B14

A15 34 B15

A16 33 B16

A17 31 B17

EN1

EN4

2C3

5C6

Fig. 2. IEC logic symbol

001aal733

VCC

to internal circuitdata input

Fig. 3. Bus hold circuit

Product data sheet Rev. 6 — 13 March 2019 2 / 15

74ALVCH16501

Nexperia 74ALVCH16501

18-bit universal bus transceiver; 3-state

001aal719

OEAB

CPBA

LEBA

CPAB

LEAB

OEBA

18 IDENTICAL CHANNELS

Fig. 4. Logic diagram

Product data sheet Rev. 6 — 13 March 2019 3 / 15

74ALVCH16501 jjjjjjjjjjjjjjjjjjjjjjjjjjjj O ECEEEEEEEEEEEEEEEEEEEEEEEEﬁE

Nexperia 74ALVCH16501

18-bit universal bus transceiver; 3-state

5. Pinning information

5.1. Pinning

74ALVCH16501

OEAB GND

LEAB CPAB

A0 B0

GND GND

A1 B1

A2 B2

VCC VCC

A3 B3

A4 B4

A5 B5

GND GND

A6 B6

A7 B7

A8 B8

A9 B9

A10 B10

A11 B11

GND GND

A12 B12

A13 B13

A14 B14

VCC VCC

A15 B15

A16 B16

GND GND

A17 B17

OEBA CPBA

LEBA GND

001aal716

Fig. 5. Pin configuration SOT364-1 (TSSOP56)

Product data sheet Rev. 6 — 13 March 2019 4 / 15

74ALVCH16501 Table 2. Pin description

Nexperia 74ALVCH16501

18-bit universal bus transceiver; 3-state

5.2. Pin description

Table 2. Pin description

Symbol Pin Description

OEAB 1 output enable A-to-B input (active HIGH)

LEAB 2 latch enable A-to-B input

A0 to A17 3, 5, 6, 8, 9, 10, 12, 13, 14, 15, 16, 17,

19, 20, 21, 23, 24, 26

data inputs or outputs

GND 4, 11, 18, 25, 29, 32, 39, 46, 53, 56 ground (0 V)

VCC 7, 22, 35, 50 positive supply voltage

OEBA 27 output enable B-to-A (active LOW)

LEBA 28 latch enable B-to-A

CPBA 30 clock input B-to-A

B0 to B17 54, 52, 51, 49, 48, 47, 45, 44, 43, 42, 41, 40,

38, 37, 36, 34, 33, 31

data inputs or outputs

CPAB 55 clock input A-to-B

6. Functional description

Table 3. Function table

A-to-B data flow is shown; B-to-A flow is similar but uses OEBA, LEBA and CPBA.

H = HIGH voltage level;

h = HIGH voltage level one set-up time prior to the enable or clock transition;

L = LOW voltage level;

l = LOW voltage level one set-up time prior to the enable or clock transition;

X = don’t care;

Z = high-impedance OFF-state;

↓ = HIGH-to-LOW clock transition;

↑ = LOW-to-HIGH clock transition.

Inputs Output

OEAB LEAB CPAB An Bn

Operating mode

L X X X Z disabled

HHXHH

H H X L L

transparent

H ↓ X h H

H ↓ X l L

latch data and display

H L ↑ h H

H L ↑ l L

clock data and display

H L H or L X H

H L H or L X L

hold data and display

Product data sheet Rev. 6 — 13 March 2019 5 / 15

74ALVCH16501 Table 5. Recommended operating conditions

Nexperia 74ALVCH16501

18-bit universal bus transceiver; 3-state

7. Limiting values

Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions Min Max Unit

VCC supply voltage -0.5 +4.6 V

IIK input clamping current VI < 0 V -50 - mA

control inputs [1] -0.5 +4.6 VVIinput voltage

data inputs [1] -0.5 VCC + 0.5 V

IOK output clamping current VO > VCC or VO < 0 V - ±50 mA

VOoutput voltage [1] -0.5 VCC + 0.5 V

IOoutput current VO = 0 V to VCC - ±50 mA

ICC supply current - 100 mA

IGND ground current -100 - mA

Tstg storage temperature -65 +150 °C

Ptot total power dissipation Tamb = -40 °C to +125 °C [2] - 600 mW

[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

[2] Above 55 °C the value of Ptot derates linearly with 8 mW/K.

8. Recommended operating conditions

Table 5. Recommended operating conditions

Symbol Parameter Conditions Min Typ Max Unit

maximum speed performance

CL = 30 pF 2.3 - 2.7 V

CL = 50 pF 3.0 - 3.6 V

VCC supply voltage

low-voltage applications 1.2 - 3.6 V

VIinput voltage 0 - VCC V

VOoutput voltage 0 - VCC V

Tamb ambient temperature in free air -40 - +85 °C

VCC = 2.3 V to 3.0 V 0 - 20 ns/VΔt/ΔV input transition rise and fall rate

VCC = 3.0 V to 3.6 V 0 - 10 ns/V

Product data sheet Rev. 6 — 13 March 2019 6 / 15

74ALVCH16501

Nexperia 74ALVCH16501

18-bit universal bus transceiver; 3-state

9. Static characteristics

Table 6. Static characteristics

At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions Min Typ [1] Max Unit

Tamb = -40 °C to +85 °C

VCC = 2.3 V to 2.7 V 1.7 1.2 - VVIH HIGH-level input

voltage VCC = 2.7 V to 3.6 V 2.0 1.5 - V

VCC = 2.3 V to 2.7 V - 1.2 0.7 VVIL LOW-level input

voltage VCC = 2.7 V to 3.6 V - 1.5 0.8 V

VI = VIH or VIL

IO = -100 μA; VCC = 2.3 V to 3.6 V VCC - 0.2 VCC - V

IO = -6 mA; VCC = 2.3 V VCC - 0.3 VCC - 0.08 - V

IO = -12 mA; VCC = 2.3 V VCC - 0.6 VCC - 0.26 - V

IO = -12 mA; VCC = 2.7 V VCC - 0.5 VCC - 0.14 - V

IO = -12 mA; VCC = 3.0 V VCC - 0.6 VCC - 0.09 - V

VOH HIGH-level output

voltage

IO = -24 mA; VCC = 3.0 V VCC - 1.0 VCC - 0.28 - V

VI = VIH or VIL

IO = 100 μA; VCC = 2.3 V to 3.6 V - GND 0.20 V

IO = 6 mA; VCC = 2.3 V - 0.07 0.40 V

IO = 12 mA; VCC = 2.3 V - 0.15 0.70 V

IO = 12 mA; VCC = 2.7 V - 0.14 0.40 V

VOL LOW-level output

voltage

IO = 24 mA; VCC = 3.0 V - 0.27 0.55 V

IIinput leakage current VI = VCC or GND; VCC = 2.3 V to 3.6 V - 0.1 5 μA

IOZ OFF-state output

current

VI = VIH or VIL; VO = VCC or GND;

VCC = 2.7 V to 3.6 V

- 0.1 10 μA

ICC supply current VCC = 2.3 V to 3.6 V; VI = VCC or GND;

IO = 0 A

- 0.2 40 μA

ΔICC additional supply

current

per data I/O pin; VCC = 2.3 V to 3.6 V;

VI = VCC - 0.6 V; IO = 0 A

- 150 750 μA

VCC = 2.3 V; VI = 0.7 V [2] 45 - - μAIBHL bus hold LOW current

VCC = 3.0 V; VI = 0.8 V [2] 75 150 - μA

VCC = 2.3 V; VI = 1.7 V [2] -45 - - μAIBHH bus hold HIGH

current VCC = 3.0 V; VI = 2.0 V [2] -75 -175 - μA

IBHLO bus hold LOW

overdrive current

VCC = 3.6 V [2] 500 - - μA

IBHHO bus hold HIGH

overdrive current

VCC = 3.6 V [2] -500 - - μA

CIinput capacitance - 4.0 - pF

CI/O input/output

capacitance

- 8.0 - pF

[1] All typical values are measured at Tamb = 25 °C.

[2] Valid for data inputs of bus hold parts only.

Product data sheet Rev. 6 — 13 March 2019 7 / 15

74ALVCH16501

Nexperia 74ALVCH16501

18-bit universal bus transceiver; 3-state

10. Dynamic characteristics

Table 7. Dynamic characteristics

At recommended operating conditions. Voltages are referenced to GND (ground = 0 V); test circuit Fig. 10.

Symbol Parameter Conditions Min Typ [1] Max Unit

Tamb = -40 °C to +85 °C

see Fig. 8

VCC = 2.3 V to 2.7 V [2] 150 333 - MHz

VCC = 3.0 V to 3.6 V [3] 150 340 - MHz

fmax maximum frequency

VCC = 2.7 V 150 333 - MHz

An to Bn; Bn to An; see Fig. 6 [4]

VCC = 2.3 V to 2.7 V [2] 1.0 2.8 5.1 ns

VCC = 3.0 V to 3.6 V [3] 1.0 3.0 4.2 ns

VCC = 2.7 V - 3.0 4.6 ns

LEAB, LEBA to Bn, An; see Fig. 8

VCC = 2.3 V to 2.7 V [2] 1.1 3.5 6.1 ns

VCC = 3.0 V to 3.6 V [3] 1.3 3.4 4.8 ns

VCC = 2.7 V - 3.6 5.3 ns

CPAB, CPBA to Bn, An; see Fig. 8

VCC = 2.3 V to 2.7 V [2] 1.0 3.3 6.1 ns

VCC = 3.0 V to 3.6 V [3] 1.4 3.3 4.9 ns

tpd propagation delay

VCC = 2.7 V - 3.4 5.6 ns

OEBA to An; see Fig. 7 [4]

VCC = 2.3 V to 2.7 V [2] 1.3 2.8 6.3 ns

VCC = 3.0 V to 3.6 V [3] 1.1 2.5 5.0 ns

VCC = 2.7 V - 3.3 6.0 ns

OEAB to Bn; see Fig. 7

VCC = 2.3 V to 2.7 V [2] 1.0 2.5 5.8 ns

VCC = 3.0 V to 3.6 V [3] 1.0 2.4 4.6 ns

ten enable time

VCC = 2.7 V - 2.7 5.3 ns

OEBA to An; see Fig. 7 [4]

VCC = 2.3 V to 2.7 V [2] 1.3 2.5 5.3 ns

VCC = 3.0 V to 3.6 V [3] 1.3 3.1 4.2 ns

VCC = 2.7 V - 3.3 4.6 ns

OEAB to Bn; see Fig. 7

VCC = 2.3 V to 2.7 V [2] 1.5 2.5 6.2 ns

VCC = 3.0 V to 3.6 V [3] 1.4 2.9 5.0 ns

tdis disable time

VCC = 2.7 V - 3.6 5.7 ns

Product data sheet Rev. 6 — 13 March 2019 8 / 15

74ALVCH16501

Nexperia 74ALVCH16501

18-bit universal bus transceiver; 3-state

Symbol Parameter Conditions Min Typ [1] Max Unit

LEAB, LEBA HIGH; see Fig. 8

VCC = 2.3 V to 2.7 V [2] 3.3 0.8 - ns

VCC = 3.0 V to 3.6 V [3] 3.3 0.9 - ns

VCC = 2.7 V 3.3 0.7 - ns

CPAB, CPBA HIGH or LOW; see Fig. 8

VCC = 2.3 V to 2.7 V [2] 3.3 2.0 - ns

VCC = 3.0 V to 3.6 V [3] 3.3 1.1 - ns

tWpulse width

VCC = 2.7 V 3.3 1.4 - ns

An, Bn to CPAB, CPBA; see Fig. 9

VCC = 2.3 V to 2.7 V [2] 1.7 0.1 - ns

VCC = 3.0 V to 3.6 V [3] 1.3 -0.3 - ns

VCC = 2.7 V 1.4 -0.1 - ns

An, Bn to LEAB, LEBA; see Fig. 9

VCC = 2.3 V to 2.7 V [2] 1.1 0.1 - ns

VCC = 3.0 V to 3.6 V [3] 1.0 0.3 - ns

tsu set-up time

VCC = 2.7 V 1.0 -0.2 - ns

An, Bn to CPAB, CPBA; see Fig. 9

VCC = 2.3 V to 2.7 V [2] 1.7 0.3 - ns

VCC = 3.0 V to 3.6 V [3] 1.3 0.4 - ns

VCC = 2.7 V 1.6 0.3 - ns

An, Bn to LEAB, LEBA; see Fig. 9

VCC = 2.3 V to 2.7 V [2] 1.6 0.3 - ns

VCC = 3.0 V to 3.6 V [3] 1.2 0.1 - ns

thhold time

VCC = 2.7 V 1.5 0.1 - ns

per buffer; VI = GND to VCC [5]

outputs enabled - 21 - pF

CPD power dissipation capacitance

outputs disabled - 3 - pF

[1] All typical values are measured at Tamb = 25 °C.

[2] Typical values are measured at VCC = 2.5 V.

[3] Typical values are measured at VCC = 3.3 V.

[4] tpd is the same as tPLH and tPHL.

ten is the same as tPZL and tPZH.

tdis is the same as tPLZ and tPHZ.

[5] CPD is used to determine the dynamic power dissipation (PD in μW).

PD = CPD × VCC

2 × fi × N + Σ (CL × VCC

2 × fo) where:

fi = input frequency in MHz;

fo = output frequency in MHz;

CL = output load capacitance in pF;

VCC = supply voltage in Volts;

N = total load switching outputs;

Σ (CL × VCC

2 × fo) = sum of outputs.

Product data sheet Rev. 6 — 13 March 2019 9 / 15

74ALVCH16501 ﬂ Table 8 ;/ L Table 8

Nexperia 74ALVCH16501

18-bit universal bus transceiver; 3-state

10.1. Waveforms and test circuit

001aal734

An, Bn

input

Bn, An

output

tPHL tPLH

GND

VOH

VOL

Measurement points are given in Table 8.

VOL and VOH are typical output levels that occur with the output load.

Fig. 6. Propagation delay, data input (An, Bn) to data output (Bn, An)

001aal721

tPLZ

tPHZ

outputs

disabled

outputs

enabled

outputs

enabled

An, Bn output

LOW-to-OFF

OFF-to-LOW

An, Bn output

HIGH-to-OFF

OFF-to-HIGH

OEAB, OEBA

input

GND

VOL

VOH

VCC

VMVM

GND

tPZL

tPZH

Measurement points are given in Table 8.

VOL and VOH are typical output levels that occur with the output load.

Fig. 7. 3-state output enable and disable times

001aal720

tPHL tPLH

1 / fmax

VMVM

LExx

input

CPxx

input

An, Bn

output

GND

VOH

VOL

Measurement points are given in Table 8.

VOL and VOH are typical output levels that occur with the output load.

Fig. 8. Propagation delay, latch enable input (LEAB, LEBA) and clock pulse input (CPAB, CPBA) to data output,

and pulse width

Product data sheet Rev. 6 — 13 March 2019 10 / 15

74ALVCH16501 /_ 901351722 Table 3 Table 8. Measurement points Table 9 Table 9. Test data

Nexperia 74ALVCH16501

18-bit universal bus transceiver; 3-state

001aal722

GND

An, Bn

input

CPxx, LExx

input VMVM

tsu thtsu th

VMVMVM

Measurement points are given in Table 8.

Fig. 9. Data set-up and hold times (An, Bn inputs to LEAB, LEBA, CPAB and CPBA inputs)

Table 8. Measurement points

Supply voltage Input Output

VCC VIVMVMVXVY

2.3 V to 2.7 V and < 2.3 V VCC 0.5 × VCC 0.5 × VCC VOL + 0.15 V VOH - 0.15 V

2.7 V 2.7 V 1.5 V 1.5 V VOL + 0.3 V VOH - 0.3 V

3.0 V to 3.6 V 2.7 V 1.5 V 1.5 V VOL + 0.3 V VOH - 0.3 V

VEXT

VCC

VIVO

mna616

DUT

Test data is given in Table 9.

Definitions for test circuit:

RL = Load resistance.

CL = Load capacitance includes jig and probe capacitance.

RT = Termination resistance should be equal to Zo of pulse generator.

VEXT = External voltage for measuring switching times.

Fig. 10. Test circuit for measuring switching times

Table 9. Test data

Supply voltage Input Load VEXT

VCC VItr, tfCLRLtPLH, tPHL tPLZ, tPZL tPHZ, tPZH

2.3 V to 2.7 V VCC ≤ 2.0 ns 30 pF 500 Ω open 2 × VCC GND

2.7 V 2.7 V 2.5 ns 50 pF 500 Ω open 2 × VCC GND

3.0 V to 3.6 V 2.7 V 2.5 ns 50 pF 500 Ω open 2 × VCC GND

Product data sheet Rev. 6 — 13 March 2019 11 / 15

74ALVCH16501

Nexperia 74ALVCH16501

18-bit universal bus transceiver; 3-state

11. Package outline

UNIT A

1 A

2 A

3 b

p c D

(1) E

(2) e H

E L L

p Q Z y w v θ

REFERENCES

OUTLINE

VERSION

EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

mm 0.15

0.05

0.2

0.1

DIMENSIONS (mm are the original dimensions).

Notes

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.

SOT364-1 99-12-27

03-02-19

w M

detail X

(A )

0.25

1 28

56 29

pin 1 index

1.05

0.85

0.28

0.17

0.2

0.1

14.1

13.9

6.2

6.0 0.5 1

8.3

7.9

0.50

0.35

0.5

0.1

0.08 0.25

0.8

0.4

E v M A

TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1 mm SOT364-1

max.

1.2

2.5

5 mm

scale

MO-153

Fig. 11. Package outline SOT364-1 (TSSOP56)

Product data sheet Rev. 6 — 13 March 2019 12 / 15

74ALVCH16501 Table 10. Abbreviations Table 11. Revision history Table 8

Nexperia 74ALVCH16501

18-bit universal bus transceiver; 3-state

12. Abbreviations

Table 10. Abbreviations

Acronym Description

CMOS Complementary Metal-Oxide Semiconductor

DUT Device Under Test

TTL Transistor-Transistor Logic

13. Revision history

Table 11. Revision history

Document ID Release date Data sheet status Change notice Supersedes

74ALVCH16501 v.6 20190313 Product data sheet - 74ALVCH16501 v.5

Modifications: •The format of this data sheet has been redesigned to comply with the identity guidelines

of Nexperia.

•Legal texts have been adapted to the new company name where appropriate.

•Type numbers 74ALVCH16501DL (SOT371-1) removed.

74ALVCH16501 v.5 20120710 Product data sheet - 74ALVCH16501 v.4

Modifications: •Table 8 corrected (errata).

74ALVCH16501 v.4 20111117 Product data sheet - 74ALVCH16501 v.3

Modifications: •Legal pages updated.

74ALVCH16501 v.3 20100402 Product data sheet - 74ALVCH16501 v.2

74ALVCH16501 v.2 19980929 Product specification - 74ALVCH16501 v.1

74ALVCH16501 v.1 19980929 Product specification - -

Product data sheet Rev. 6 — 13 March 2019 13 / 15

74ALVCH16501 same In a deswgn on new sheet’ .5 exp‘amed in status er den/ms) described 2 «ms documenl was publish es. The latest produd slam hugs waw nexg mm sale 7 Max us or eon ns Mcomme m me genera‘ ierm and can m llwww nex er

Nexperia 74ALVCH16501

18-bit universal bus transceiver; 3-state

14. Legal information

Data sheet status

Document status

[1][2]

Product

status [3]

Definition

Objective [short]

data sheet

Development This document contains data from

the objective specification for

product development.

Preliminary [short]

data sheet

Qualification This document contains data from

the preliminary specification.

Product [short]

data sheet

Production This document contains the product

specification.

[1] Please consult the most recently issued document before initiating or

completing a design.

[2] The term 'short data sheet' is explained in section "Definitions".

[3] The product status of device(s) described in this document may have

changed since this document was published and may differ in case of

multiple devices. The latest product status information is available on

the internet at https://www.nexperia.com.

Definitions

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modifications or additions. Nexperia does not give any representations or

warranties as to the accuracy or completeness of information included herein

and shall have no liability for the consequences of use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and title. A short data sheet is

intended for quick reference only and should not be relied upon to contain

detailed and full information. For detailed and full information see the relevant

full data sheet, which is available on request via the local Nexperia sales

office. In case of any inconsistency or conflict with the short data sheet, the

full data sheet shall prevail.

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data sheet shall define the specification of the product as agreed between

Nexperia and its customer, unless Nexperia and customer have explicitly

agreed otherwise in writing. In no event however, shall an agreement be

valid in which the Nexperia product is deemed to offer functions and qualities

beyond those described in the Product data sheet.

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to be accurate and reliable. However, Nexperia does not give any

representations or warranties, expressed or implied, as to the accuracy

or completeness of such information and shall have no liability for the

consequences of use of such information. Nexperia takes no responsibility

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specifications and product descriptions, at any time and without notice. This

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warranted to be suitable for use in life support, life-critical or safety-critical

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suppliers accept no liability for inclusion and/or use of Nexperia products in

such equipment or applications and therefore such inclusion and/or use is at

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Quick reference data — The Quick reference data is an extract of the

product data given in the Limiting values and Characteristics sections of this

document, and as such is not complete, exhaustive or legally binding.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. Nexperia makes no representation

or warranty that such applications will be suitable for the specified use

without further testing or modification.

Customers are responsible for the design and operation of their applications

and products using Nexperia products, and Nexperia accepts no liability for

any assistance with applications or customer product design. It is customer’s

sole responsibility to determine whether the Nexperia product is suitable

and fit for the customer’s applications and products planned, as well as

for the planned application and use of customer’s third party customer(s).

Customers should provide appropriate design and operating safeguards to

minimize the risks associated with their applications and products.

Nexperia does not accept any liability related to any default, damage, costs

or problem which is based on any weakness or default in the customer’s

applications or products, or the application or use by customer’s third party

customer(s). Customer is responsible for doing all necessary testing for the

customer’s applications and products using Nexperia products in order to

avoid a default of the applications and the products or of the application or

use by customer’s third party customer(s). Nexperia does not accept any

liability in this respect.

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those

given in the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanently and irreversibly affect

the quality and reliability of the device.

Terms and conditions of commercial sale — Nexperia products are

sold subject to the general terms and conditions of commercial sale, as

published at http://www.nexperia.com/profile/terms, unless otherwise agreed

in a valid written individual agreement. In case an individual agreement is

concluded only the terms and conditions of the respective agreement shall

apply. Nexperia hereby expressly objects to applying the customer’s general

terms and conditions with regard to the purchase of Nexperia products by

customer.

No offer to sell or license — Nothing in this document may be interpreted

or construed as an offer to sell products that is open for acceptance or the

grant, conveyance or implication of any license under any copyrights, patents

or other industrial or intellectual property rights.

Export control — This document as well as the item(s) described herein

may be subject to export control regulations. Export might require a prior

authorization from competent authorities.

Non-automotive qualified products — Unless this data sheet expressly

states that this specific Nexperia product is automotive qualified, the

product is not suitable for automotive use. It is neither qualified nor tested in

accordance with automotive testing or application requirements. Nexperia

accepts no liability for inclusion and/or use of non-automotive qualified

products in automotive equipment or applications.

In the event that customer uses the product for design-in and use in

automotive applications to automotive specifications and standards,

customer (a) shall use the product without Nexperia’s warranty of the

product for such automotive applications, use and specifications, and (b)

whenever customer uses the product for automotive applications beyond

Nexperia’s specifications such use shall be solely at customer’s own risk,

and (c) customer fully indemnifies Nexperia for any liability, damages or failed

product claims resulting from customer design and use of the product for

automotive applications beyond Nexperia’s standard warranty and Nexperia’s

product specifications.

Translations — A non-English (translated) version of a document is for

reference only. The English version shall prevail in case of any discrepancy

between the translated and English versions.

Trademarks

Notice: All referenced brands, product names, service names and

trademarks are the property of their respective owners.

Product data sheet Rev. 6 — 13 March 2019 14 / 15

74ALVCH16501

Nexperia 74ALVCH16501

18-bit universal bus transceiver; 3-state

Contents

1. General description......................................................1

2. Features and benefits.................................................. 1

3. Ordering information....................................................1

4. Functional diagram.......................................................2

5. Pinning information......................................................4

5.1. Pinning.........................................................................4

5.2. Pin description............................................................. 5

6. Functional description................................................. 5

7. Limiting values............................................................. 6

8. Recommended operating conditions..........................6

9. Static characteristics....................................................7

10. Dynamic characteristics............................................ 8

10.1. Waveforms and test circuit...................................... 10

11. Package outline........................................................ 12

12. Abbreviations............................................................ 13

13. Revision history........................................................13

14. Legal information......................................................14

For more information, please visit: http://www.nexperia.com

For sales office addresses, please send an email to: salesaddresses@nexperia.com

Date of release: 13 March 2019

Product data sheet Rev. 6 — 13 March 2019 15 / 15

74ALVCH16501 Datasheet by Nexperia USA Inc.

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