74ABT827 Datasheet by NXP USA Inc. | Digi-Key Electronics

74ABT827 Datasheet by NXP USA Inc.

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1. General description
The 74ABT827 high-performance BiCMOS device combines low static and dynamic
power dissipation with high speed and high output drive.
The 74ABT827 10-bit buffers provide high performance bus interface buffering for wide
data/address paths or buses carrying parity. They have NOR Output Enables (OE0, OE1)
for maximum control flexibility.
2. Features and benefits
Ideal where high speed, light loading, or increased fan-in are required
Flow-through pinout architecture for microprocessor oriented applications
Output capability: +64 mA and 32 mA
Power-up 3-state
Inputs are disabled during 3-state mode
Latch-up protection exceeds 500 mA per JESD78B class II level A
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
3. Ordering information
74ABT827
10-bit buffer/line driver; non-inverting; 3-state
Rev. 5 — 7 November 2011 Product data sheet
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74ABT827D 40 C to +85 CSO24 plastic small outline package; 24 leads; body width
7.5 mm SOT137-1
74ABT827DB 40 C to +85 CSSOP24 plastic shrink small outline package; 24 leads; body
width 5.3 mm SOT340-1
74ABT827PW 40 C to +85 CTSSOP24 plastic thin shrink small outline package; 24 leads;
body width 4.4 mm SOT355-1
:v WWWWWW
74ABT827 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 5 — 7 November 2011 2 of 14
NXP Semiconductors 74ABT827
10-bit buffer/line driver; non-inverting; 3-state
4. Functional diagram
Fig 1. Logic symbol Fig 2. IEEE/IEC logic symbol
001aae885
13 OE1
Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
A0 A1 A2 A3 A4 A5 A6 A7
23 22 21 20 19 18 17 16
23456789
1 OE0
15
10
Y8
A8
14
11
Y9
A9
1
1
EN1
&
13
223
322
421
520
619
718
817
916
10 15
11 14
001aae886
Fig 3. Logic diagram
001aae887
A0
Y0
13
1
A1
Y1
A2
Y2
A3
Y3
A4
Y4
A5
Y5
A6
Y6
A7
Y7
A8
Y8
A9
23 22 21 20 19 18 17 16 15 14
234567891011
Y9
OE0
OE1
7 33333333333: O EEEEEEEEEEEE 7 le
74ABT827 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 5 — 7 November 2011 3 of 14
NXP Semiconductors 74ABT827
10-bit buffer/line driver; non-inverting; 3-state
5. Pinning information
5.1 Pinning
5.2 Pin description
6. Functional description
6.1 Function table
[1] H = HIGH voltage level;
L = LOW voltage level;
X = don t care;
Z = high-impedance OFF-state.
Fig 4. Pin configuration
74ABT827
OE0 VCC
A0 Y0
A1 Y1
A2 Y2
A3 Y3
A4 Y4
A5 Y5
A6 Y6
A7 Y7
A8 Y8
A9 Y9
GND OE1
001aae884
1
2
3
4
5
6
7
8
9
10
11
12
14
13
16
15
18
17
20
19
22
21
24
23
Table 2. Pin description
Symbol Pin Description
OE0 1 output enable input (active LOW)
A0 to A9 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 data input
GND 12 ground (0 V)
OE113 output enable input (active LOW)
Y0 to Y9 23, 22, 21, 20, 19, 18, 17, 16, 15, 14 data output
VCC 24 supply voltage
Table 3. Function table[1]
Inputs Output Operating mode
OEnAn Yn
LLLtransparent
L H H transparent
H X Z high-impedance
74ABT827 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 5 — 7 November 2011 4 of 14
NXP Semiconductors 74ABT827
10-bit buffer/line driver; non-inverting; 3-state
7. Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150 C.
8. Recommended operating conditions
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 0.5 +7.0 V
VIinput voltage [1] 1.2 +7.0 V
VOoutput voltage output in OFF-state or HIGH-state [1] 0.5 +5.5 V
IIK input clamping current VI < 0 V 18 -mA
IOK output clamping current VO < 0 V 50 -mA
IOoutput current output in LOW-state -128 mA
Tjjunction temperature [2] -150 C
Tstg storage temperature 65 +150 C
Table 5. Recommended operating conditions
Symbol Parameter Conditions Min Typ Max Unit
VCC supply voltage 4.5 -5.5 V
VIinput voltage 0 - VCC V
VIH HIGH-level input voltage 2.0 --V
VIL LOW-level input voltage --0.8 V
IOH HIGH-level output current 32 --mA
IOL LOW-level output current --64 mA
t/Vinput transition rise and fall rate 0- 5ns/V
Tamb ambient temperature in free air 40 -+85 C
74ABT827 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 5 — 7 November 2011 5 of 14
NXP Semiconductors 74ABT827
10-bit buffer/line driver; non-inverting; 3-state
9. Static characteristics
[1] This parameter is valid for any VCC between 0 V and 2.1 V with a transition time of up to 10 ms. For VCC = 2.1 V to VCC = 5 V 10 %, a
transition time of up to 100 s is permitted.
[2] Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
[3] This is the increase in supply current for each input at 3.4 V.
Table 6. Static characteristics
Symbol Parameter Conditions 25 C40 C to +85 CUnit
Min Typ Max Min Max
VIK input clamping voltage VCC = 4.5 V; IIK = 18 mA 1.2 0.9 -1.2 - V
VOH HIGH-level output
voltage VI = VIL or VIH
VCC = 4.5 V; IOH = 3 mA 2.5 2.9 -2.5 - V
VCC = 5.0 V; IOH = 3 mA 3.0 3.4 -3.0 - V
VCC = 4.5 V; IOH = 32 mA 2.0 2.4 -2.0 - V
VOL LOW-level output
voltage VCC = 4.5 V; IOL = 64 mA;
VI = VIL or VIH
-0.42 0.55 -0.55 V
IIinput leakage current VCC = 5.5 V; VI = GND or 5.5 V - 0.01 1.0 -1.0 A
IOFF power-off leakage
current VCC = 0 V; VI or VO 4.5 V - 5.0 100 -100 A
IO(pu/pd) power-up/power-down
output current VCC = 2.0 V; VO = 0.5 V;
VI = GND or VCC; OEn HIGH
[1] -5.0 50 -50 A
IOZ OFF-state output current VCC = 5.5 V; VI = VIL or VIH
VO = 2.7 V - 5.0 50 -50 A
VO = 0.5 V - 5.0 50 -50 A
ILO output leakage current HIGH-state; VO = 5.5 V;
VCC = 5.5 V; VI = GND or VCC
-5.0 50 -50 A
IOoutput current VCC = 5.5 V; VO = 2.5 V [2] 180 80 50 180 50 mA
ICC supply current VCC = 5.5 V; VI = GND or VCC
outputs HIGH-state -0.5 250 -250 A
outputs LOW-state -25 38 -38 mA
outputs disabled -0.5 250 -250 A
ICC additional supply current per input pin; VCC = 5.5 V; one
input at 3.4 V; other inputs at
VCC or GND
[3]
outputs enabled -0.5 1.5 -1.5 mA
outputs 3-state, one data
input -0.01 50 -50 mA
outputs 3-state; one enable
input -0.5 1.5 -1.5 mA
CIinput capacitance VI = 0 V or VCC - 4 - - - pF
COoutput capacitance outputs disabled; VO = 0 V
or VCC
- 7 - - - pF
circuir, see Figure 7 Figure 5 Figure 5 Figure 6 Figure 6 Figure 6 Figure 6
74ABT827 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 5 — 7 November 2011 6 of 14
NXP Semiconductors 74ABT827
10-bit buffer/line driver; non-inverting; 3-state
10. Dynamic characteristics
11. Waveforms
Table 7. Dynamic characteristics
GND = 0 V; for test circuit, see Figure 7.
Symbol Parameter Conditions 25 C;
VCC = 5.0 V
40 C to +85 C;
VCC = 5.0 V 0.5 V Unit
Min Typ Max Min Max
tPLH LOW to HIGH propagation delay An to Yn; see Figure 5 1.1 3.0 4.4 1.1 4.8 ns
tPHL HIGH to LOW propagation delay An to Yn; see Figure 5 1.1 2.9 4.1 1.1 4.7 ns
tPZH OFF-state to HIGH propagation delay OEn to Yn; see Figure 6 1.6 3.7 5.1 1.6 5.9 ns
tPZL OFF-state to LOW propagation delay OEn to Yn; see Figure 6 2.6 4.6 5.9 2.6 6.9 ns
tPHZ HIGH to OFF-state propagation delay OEn to Yn; see Figure 6 2.0 4.8 6.3 2.0 6.8 ns
tPLZ LOW to OFF-state propagation delay OEn to Yn; see Figure 6 2.5 5.1 6.6 2.5 6.9 ns
VM = 1.5 V
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 5. Propagation delay input (An) to output (Yn)
001aal244
An input
Yn output
tPLH tPHL
GND
VI
VM
VM
VM
VM
VOH
VOL
ifliifl
74ABT827 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 5 — 7 November 2011 7 of 14
NXP Semiconductors 74ABT827
10-bit buffer/line driver; non-inverting; 3-state
VM = 1.5 V
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 6. 3-state enable and disable times
001aal293
tPLZ
tPHZ
outputs
disabled
outputs
enabled
VOH 0.3 V
VOL + 0.3 V
outputs
enabled
output
LOW-to-OFF
OFF-to-LOW
output
HIGH-to-OFF
OFF-to-HIGH
OEn input
VI
VOL
VOH
3.5 V
VM
GND
GND
tPZL
tPZH
VM
VM
a. Input pulse definition b. Test circuit
Test data and VEXT levels are given in Table 8.
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
VEXT = Test voltage for switching times.
Fig 7. Test circuit for measuring switching times
VEXT
VCC
VIVO
mna616
DUT
CL
RT
RL
RL
G
Table 8. Test data
Input Load VEXT
VIfItWtr, tfCLRLtPHL, tPLH tPZH, tPHZ tPZL, tPLZ
3.0 V 1 MHz 500 ns 2.5 ns 50 pF 500 open open 7.0 V
HHHHflW‘HHHHfiH-E
74ABT827 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 5 — 7 November 2011 8 of 14
NXP Semiconductors 74ABT827
10-bit buffer/line driver; non-inverting; 3-state
12. Package outline
Fig 8. Package outline SOT137-1 (SO24)
UNIT A
max. A1A2A3bpcD
(1) E(1) (1)
eH
ELL
pQZ
ywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm
inches
2.65 0.3
0.1 2.45
2.25 0.49
0.36 0.32
0.23 15.6
15.2 7.6
7.4 1.27 10.65
10.00 1.1
1.0 0.9
0.4 8
0
o
o
0.25 0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
1.1
0.4
SOT137-1
X
12
24
wM
θ
A
A1
A2
bp
D
HE
Lp
Q
detail X
E
Z
c
L
vMA
13
(A )
3
A
y
0.25
075E05 MS-013
pin 1 index
0.1 0.012
0.004 0.096
0.089 0.019
0.014 0.013
0.009 0.61
0.60 0.30
0.29 0.05
1.4
0.055
0.419
0.394 0.043
0.039 0.035
0.016
0.01
0.25
0.01 0.004
0.043
0.016
0.01
e
1
0 5 10 mm
scale
SO24: plastic small outline package; 24 leads; body width 7.5 mm SOT137-1
99-12-27
03-02-19
HflHHHHH ‘ V Q; 7 ,,,,,, T fffff 7 M d 1 f ‘: £er + fl JL— :I SQ 994.347»
74ABT827 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 5 — 7 November 2011 9 of 14
NXP Semiconductors 74ABT827
10-bit buffer/line driver; non-inverting; 3-state
Fig 9. Package outline SOT340-1 (SSOP24)
UNIT A1A2A3bpcD
(1) E(1) (1)
eH
ELL
pQZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.21
0.05 1.80
1.65 0.38
0.25 0.20
0.09 8.4
8.0 5.4
5.2 0.65 1.25
7.9
7.6 0.9
0.7 0.8
0.4 8
0
o
o
0.13 0.10.2
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.2 mm maximum per side are not included.
1.03
0.63
SOT340-1 MO-150 99-12-27
03-02-19
X
wM
θ
A
A1
A2
bp
D
HE
Lp
Q
detail X
E
Z
e
c
L
vMA
(A )
3
A
112
24 13
0.25
y
pin 1 index
0 2.5 5 mm
scale
SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm SOT340-1
A
max.
2
WHHHHH‘HHHHHH % Ti} 6;} iiiii i Wig; HHHHWHHHHHH “d ,D :I SQ
74ABT827 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 5 — 7 November 2011 10 of 14
NXP Semiconductors 74ABT827
10-bit buffer/line driver; non-inverting; 3-state
Fig 10. Package outline SOT355-1 (TSSOP24)
UNIT A1A2A3bpcD
(1) E(2) (1)
eH
ELL
pQZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.15
0.05 0.95
0.80 0.30
0.19 0.2
0.1 7.9
7.7 4.5
4.3 0.65 6.6
6.2 0.4
0.3 8
0
o
o
0.13 0.10.21
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
0.75
0.50
SOT355-1 MO-153 99-12-27
03-02-19
0.25 0.5
0.2
wM
bp
Z
e
112
24 13
pin 1 index
θ
A
A1
A2
Lp
Q
detail X
L
(A )
3
HE
E
c
vMA
X
A
D
y
0 2.5 5 mm
scale
TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm SOT355-1
A
max.
1.1
74ABT827 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 5 — 7 November 2011 11 of 14
NXP Semiconductors 74ABT827
10-bit buffer/line driver; non-inverting; 3-state
13. Abbreviations
14. Revision history
Table 9. Abbreviations
Acronym Description
BiCMOS Bipolar Complementary Metal-Oxide Semiconductor
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
MM Machine Model
Table 10. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74ABT827 v.5 20111107 Product data sheet -74ABT827 v.4
Modifications: Legal pages updated.
74ABT827 v.4 20100401 Product data sheet -74ABT827 v.3
74ABT827 v.3 20100224 Product data sheet -74ABT827 v.2
74ABT827 v.2 19980116 Product specification -74ABT827 v.1
74ABT827 v.1 19950906 Product specification - -
74ABT827 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 5 — 7 November 2011 12 of 14
NXP Semiconductors 74ABT827
10-bit buffer/line driver; non-inverting; 3-state
15. Legal information
15.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
15.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
15.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
: hitE://www.nxg.com salesaddresses®nx9£0m
74ABT827 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 5 — 7 November 2011 13 of 14
NXP Semiconductors 74ABT827
10-bit buffer/line driver; non-inverting; 3-state
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
15.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
16. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
NXP Semiconductors 74ABT827
10-bit buffer/line driver; non-inverting; 3-state
© NXP B.V. 2011. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 7 November 2011
Document identifier: 74ABT827
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
17. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 1
4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
5 Pinning information. . . . . . . . . . . . . . . . . . . . . . 3
5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
6 Functional description . . . . . . . . . . . . . . . . . . . 3
6.1 Function table. . . . . . . . . . . . . . . . . . . . . . . . . . 3
7 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
8 Recommended operating conditions. . . . . . . . 4
9 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
10 Dynamic characteristics . . . . . . . . . . . . . . . . . . 6
11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8
13 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 11
14 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 11
15 Legal information. . . . . . . . . . . . . . . . . . . . . . . 12
15.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 12
15.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
15.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
15.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
16 Contact information. . . . . . . . . . . . . . . . . . . . . 13
17 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

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