B, C and D speed grades Low input and output leakage 1�A (max.) CMOS power levels True TTL input and output compatibility � VOH = 3.3V (typ.) � VOL = 0.3V (typ.) High drive outputs (-15mA IOH, 48mA IOL) Meets or exceeds JEDEC standard 18 specifications Product available in Radiation Tolerant and Radiation Enhanced versions Military product compliant to MIL-STD-883, Class B and DESC listed (dual marked) Available in DIP, SOIC, SSOP, QSOP, CERPACK and LCC packages

The IDT29FCT520AT/BT/CT/DT and IDT29FCT521AT/ BT/CT/DT each contain four 8-bit positive edge-triggered registers. These may be operated as a dual as a single 4-level pipeline. A single 8-bit input is provided and any of the four registers is available at the 8-bit, 3-state output. These devices differ only in the way data is loaded into and between the registers in 2-level operation. The difference is illustrated in Figure 1. In the IDT29FCT520AT/BT/CT/DT when data is entered into the first level = 1), the existing data in the first level is moved to the second level. In the IDT29FCT521AT/BT/CT/DT, these instructions simply cause the data in the first level to be overwritten. Transfer of data to the second level is achieved using the 4-level shift instruction = 0). This transfer also causes the first level to change. In either part I=3 is for hold.

Pin Names Dn CLK S0, S1 Description Register input Port. Clock input. Enter data into registers on LOWto-HIGH transitions. Instruction inputs. See Figure 1 and struction Control Tables. in-

Multiplexer select. Inputs either register or B2 data to be available at the output port. Output enable for 3-state output port. Register output port.

Symbol Rating Commercial VTERM(2) Terminal Voltage to +7.0 with Respect to GND (3) VTERM Terminal Voltage �0.5 to with Respect to VCC +0.5 GND TA Operating to +70 Temperature TBIAS Temperature to +125 Under Bias TSTG Storage to +125 Temperature PT Power Dissipation 0.5 I OUT DC Output Current to +120 Military to +7.0 Unit V

Symbol Parameter(1) CIN Input Capacitance COUT Output Capacitance Conditions VIN = 0V VOUT = 0V Typ. 6 8 Max. Unit pF 12

2619 lnk 03 NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed VCC by +0.5V unless otherwise noted. 2. Input and VCC terminals only. 3. Outputs and I/O terminals only.

Following Conditions Apply Unless Otherwise Specified: Commercial: to +70�C, VCC � 5%; Military: to +125�C, VCC � 10%

Symbol VIH VIL IIH IIL IOZH IOZL II VIK IOS VOH Parameter Input HIGH Level Input LOW Level Input HIGH Current High Impedance Output Current Input HIGH Current(4) Clamp Diode Voltage Short Circuit Current Output HIGH Voltage VCC = Max., VI = VCC (Max.) VCC = Min., = �18mA VCC = Max. VO = GND VCC = Min. VIN = VIH or VIL IOH = �6mA MIL. IOH = �8mA COM'L. IOH = �12mA MIL. IOH = �15mA COM'L. VOL VH ICC Output LOW Voltage Input Hysteresis Quiescent Power Supply Current VCC = Max. VIN = GND or VCC = Min. VIN = VIH or VIL IOL = 32mA MIL. IOL = 48mA COM'L. 2.0 3.0

Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VCC = Max. VCC = Max. VCC = Max. = 0.5V

NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC 5.0V, +25�C ambient. 3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second. 4. The test limit for this parameter = -55�C.