OR2C15A-6PS240I Datasheet PDF - Lattice Semiconductor
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OR2C15A-6PS240I View Datasheet(PDF) - Lattice Semiconductor

Part Name
Description
Manufacturer
OR2C15A-6PS240I
Lattice
Lattice Semiconductor Lattice
OR2C15A-6PS240I Datasheet PDF : 192 Pages
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Data Sheet
January 2002
ORCA Series 2 FPGAs
Configuration Data Format (continued)
The data frames for all the Series 2 series devices are given in Table 8. An alignment eld is required in the slave
parallel mode for the uncompressed format. The alignment eld (shown by [A]) is a series of 0s: ve for the
OR2C06A/OR2T06A, OR2C10A/OR2T10A, OR2C15A/OR2T15A/OR2T15B, and OR2C26A/OR2T26A; three for
the OR2C40A/OR2T40A/OR2T40B; and one for the OR2C04A/OR2T04A, OR2C08A/OR2T08A, and OR2C12A/
OR2T12A. The alignment eld is not required in any other mode.
Table 8. Configuration Data Frames
OR2C04A/OR2T04A
Uncompressed
010 opar epar [addr10:0] [A]1[Data109:0]111
Compressed
011 opar epar [addr10:0] 111
OR2C06A/OR2T06A
Uncompressed
010 opar epar [addr10:0] [A]1[Data129:0]111
Compressed
011 opar epar [addr10:0] 111
OR2C08A/OR2T08A
Uncompressed
010 opar epar [addr10:0] [A]1[Data149:0]111
Compressed
011 opar epar [addr10:0] 111
OR2C10A/OR2T10A
Uncompressed
010 opar epar [addr10:0] [A]1[Data169:0]111
Compressed
011 opar epar [addr10:0] 111
OR2C12A/OR2T12A
Uncompressed
010 opar epar [addr10:0] [A]1[Data189:0]111
Compressed
011 opar epar [addr10:0] 111
OR2C15A/OR2T15A/OR2T15B
Uncompressed
010 opar epar [addr10:0] [A]1[Data209:0]111
Compressed
011 opar epar [addr10:0] 111
OR2C26A/OR2T26A
Uncompressed
010 opar epar [addr10:0] [A]1[Data249:0]111
Compressed
011 opar epar [addr10:0] 111
OR2C40A/OR2T40A/OR2T40B
Uncompressed
010 opar epar [addr10:0] [A]1[Data315:0]111
Compressed
011 opar epar [addr10:0] 111
EIGHT 1s 0010
PREAMBLE
24-bit
LENGTH
COUNT
LEADING HEADER
DATA FRAMES
FPGA #1
DATA FRAMES
FPGA #2
POSTAMBLE
END OF
CONFIGURATION
FRAME
FPGA #1
END OF
CONFIGURATION
FRAME
FPGA #2
5-4530(F)
Figure 39. Serial Configuration Data Format
Lattice Semiconductor
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