UPD488448FF-C60-53-DQ2 datasheet - 128 M-bit Direct RAMbus DRAM

Details, datasheet, quote on part number: UPD488448FF-C60-53-DQ2
PartUPD488448FF-C60-53-DQ2
CategoryMemory
Description128 M-bit Direct RAMbus DRAM
CompanyNEC Electronics Inc.
DatasheetDownload UPD488448FF-C60-53-DQ2 Datasheet
  

 

Features, Applications

Description

The Direct Rambus DRAM (Direct RDRAMTM) is a general purpose high-performance memory device suitable for use in a broad range of applications including computer memory, graphics, video, and any other application where high bandwidth and low latency are required. The is 128M-bit Direct Rambus DRAM (RDRAM�), organized as 8M words by 16 bits. The use of Rambus Signaling Level (RSL) technology permits 600 MHz to 800 MHz transfer rates while using conventional system and board design technologies. Direct RDRAM devices are capable of sustained data transfers 1.25 ns per two bytes (10 ns per sixteen bytes). The architecture of the Direct RDRAMs allows the highest sustained bandwidth for multiple, simultaneous randomly addressed memory transactions. The separate control and data buses with independent row and column control yield over 95% bus efficiency. The Direct RDRAM's thirty-two banks support up to four simultaneous transactions. System oriented features for mobile, graphics and large memory systems include power management, byte masking. The �PD488448 is offered in a CSP horizontal package suitable for desktop as well as low-profile add-in card and mobile applications. Direct RDRAMs operate from a 2.5 volt supply.

Features

Highest sustained bandwidth per DRAM device - 1.6 GB/s sustained data transfer rate - Separate control and data buses for maximized efficiency - Separate row and column control buses for easy scheduling and highest performance - 32 banks: four transactions can take place simultaneously at full bandwidth data rates Low latency features - Write buffer to reduce read latency - 3 precharge mechanisms for controller flexibility - Interleaved transactions Advanced power management: - Multiple low power states allows flexibility in power consumption versus time to transition to active state - Power-down self-refresh Overdrive current mode Organization: 1 Kbyte pages and 32 banks, x 16 Uses Rambus Signaling Level (RSL) for to 800 MHz operation Package : 62-pin TAPE FBGA (�BGA�) and 62-pin PLASTIC FBGA (D BGATM (Die Dimension Ball Grid Array) )

The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version.

Not all devices/types available in every country. Please check with local NEC representative for availability and additional information.

Document No. M14837EJ3V0DS00 (3rd edition) Date Published August NS CP (K) Printed in Japan

Part number Organization Note Clock frequency (MAX.) RAS access time (ns) 62-pin PLASTIC FBGA (D2BGA) (Mirrored type) 62-pin PLASTIC FBGA (D2BGA) (Normal type) 62-pin TAPE FBGA (�BGA) (Mirrored type) 62-pin TAPE FBGA (�BGA) (Normal type) Package

Note The "32s" designation indicates that this RDRAM core is composed of 32 banks which use a "split" bank architecture.

62-pin TAPE FBGA (�BGA) (Normal type) 62-pin PLASTIC FBGA (D2BGA) (Normal type)


Note Some signals can be applied because this pin is not connected to the inside of the chip.

 

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