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TFRA84J13DS0 Datasheet(PDF) 5 Page - Agere Systems |
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TFRA84J13DS0 Datasheet(HTML) 5 Page - Agere Systems |
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5 / 14 page  5 5 Agere Systems Inc. TFRA84J13 Ultraframer Product Description, Revision 4 DS3/E3/DS2/E2/DS1/E1/DS0 April 29, 2005 One to any number of loopbacks are supported for up to 84/63 channels in DS1/E1 channels from the M13/E13 and framer functional blocks. One-to-one loopback is supported in all DS1/E1 channels. One-to-one loopback is supported for DS3/E3 channels from the M13/E13 functional blocks. Loopbacks can be configured to sectionalize a circuit for identifying faults or misconfiguration during out of service maintenance. Fast alarm channels are supported for E13 and M13 to framer interconnects for alarm indication signal (AIS or blue alarm). This feature reduces the propagation delay of the alarms by eliminating multiple integration of alarm conditions. Supports framer-only, transport (framer LIU, M13, and E13), and switching (CHI and PSB) modes of operation. 2.5 DS1/E1 Digital Jitter Attenuation (DJA) (3x28/21) The PLL bandwidth, damping factor, and sampling rates are programmable. Configurable to meet jitter and MTIE requirements. Supports one DJA per each DS1/E1. (Note that the DJA may not be cascaded.) There are 28/21 DJA channels per block. 2.6 Microprocessor Unit (MPU) (x1) 21-bit address/16-bit data bus microprocessor interface (little-endian). Synchronous (16 MHz to 66 MHz)/asynchronous micro- processor interface modes. Microprocessor data bus parity monitoring. Summary of two level priority interrupts from the E13 block (maskable). Global configuration of network performance monitoring counters operation. Global software resets. Global enabling and powerdown of major functional blocks. Registers provisionable for clear on read/clear on write. Compatible with most industry-standard processors. 2.7 JTAG IEEE ® 1149.1 JTAG boundary scan. |
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