Volt Supply Operation Low Power Dissipation Small Size & Light Weight Outstanding MIL-STD-1553 performance Radiation Hard Dielectric Isolation Monolithic Construction for Severe Environments Superior High Frequency Line Transient and Input Ripple Rejection Input and Output TTL Compatible Design Processed and Screened to MIL-STD-883 Specs MIL-PRF-38534 Compliant Devices Available

The Aeroflex Circuit Technology ACT is a next generation monolithic transceiver design which provides full compliance to MIL-STD-1553A/B and 1760 requirements in a small package with low power consumption. The ACT 4489 series performs the front-end analog function of inputting and outputting data through a transformer to the MIL-STD-1553 data bus. Design of this transceiver reflects particular attention to active filter performance. This results in low bit and word error rate with superior waveform purity and minimal zero crossover distortion. Efficient transmitter electrical and thermal design provides low internal power dissipation and heat rise at high as well as low duty cycles.

TX INHIBIT IN +5V (VL) +12V (VCC) -12V (VEE) GND3 RX DATA IN RX DATA IN CASE RX STROBE IN INPUT AMPLIFIER ACTIVE FILTER RX DATA OUT COMP. REFERENCE COMP. RX DATA OUT

The Transmitter section accepts bi-phase TTL data at the input and when coupled to the data bus with a 1:1 ratio transformer, isolated on the data bus side with two 52.5 Ohm fault isolation resistors, and loaded by two 70 Ohm terminations, the data bus signal is typically 7 Volts P-P at point A (See Figure 5). When both DATA and DATA inputs are held low or high, the transmitter output becomes a high impedance and is "removed" from the line. In addition, an overriding "INHIBIT" input provides

for the removal of the transmitter output from the line. A logic "1" signal applied to the "INHIBIT" takes priority over the condition of the data inputs and disables the transmitter (See Transmitter Logic Waveform, Figure 1). The Transmitter may be safely operated for an indefinite period with the bus (point A) short circuited at 100% duty cycle.

bi-phase differential data at the input and produces two TTL signals at the output. The outputs are DATA and DATA, and represent positive and negative excursions of the input beyond a pre-determined threshold (See Receiver Logic Waveform, Figure 2). The pre-set internal thresholds will detect data bus signals, point A Figure 5, exceeding 1.20 Volts P-P and reject signals less than 0.6 Volts P-P when used with a

transformer (See Figure 5 for transformer data and typical connection). A low level at the RX Strobe input inhibits the DATA and DATA outputs. If unused, a 2K pull-up to +5 Volts is recommended.

Note: DATA and DATA inputs must be complementary waveforms or 50% duty cycle average, with no delays between them, and must be in the same state during off times (both high or low).

Operating case temperature Storage case temperature Power supply voltage VCC VEE VL Logic input voltage Receiver differential input Receiver input voltage (common mode) Driver peak output current Total package power dissipation over the full operating case temperature rise Maximum junction to case temperature Thermal resistance � junction to case V �40 VP-P mA 2.5 Watts 10�C 4�C/W

"0" Input Current "1" Input Current "0" Input Voltage "1" Input Voltage Delay from TX inhibit, (0�1) to inhibited output Delay from TX inhibit, (1�0) to active output Differential output noise, inhibit mode Differential output impedance (inhibited) Note 1 See Figure 5 Point B Point C From mid pt inhibit pt B, See Figure 5 VIN V VIN=2.7V IILI IIHI VILI VIHI tDXOFF tDXON VNOI ZOI V nS mVP-P

Differential output level, See Figure 5 Rise and fall pt A output) See Figure 5 Output offset, Figure 3, 2.5�S after midpoint crossing of the parity bit of the last word a 660�S message See Figure 5 Delay from 50% point of TX DATA or TX DATA input to zero crossing of differential signal. See Fig 5