OPA549 by Texas Instruments Datasheet | DigiKey

OPA549 Datasheet by Texas Instruments

Burr-Brown Products from Texas Instruments DPA549 40 ES Pm ,7 *5“ TEXAS INSTRUM ENTS
OPA549
High-Voltage, High-Current
OPERATIONAL AMPLIFIER
DESCRIPTION
The OPA549 is a low-cost, high-voltage/high-current opera-
tional amplifier ideal for driving a wide variety of loads. This
laser-trimmed monolithic integrated circuit provides excellent
low-level signal accuracy and high output voltage and current.
The OPA549 operates from either single or dual supplies for
design flexibility. The input common-mode range extends
below the negative supply.
The OPA549 is internally protected against over-temperature
conditions and current overloads. In addition, the OPA549
provides an accurate, user-selected current limit. Unlike
other designs which use a “power” resistor in series with the
output current path, the OPA549 senses the load indirectly.
This allows the current limit to be adjusted from 0A to 10A
with a resistor/potentiometer, or controlled digitally with a
voltage-out or current-out Digital-to-Analog Converter (DAC).
The Enable/Status (E/S) pin provides two functions. It can be
monitored to determine if the device is in thermal shutdown,
and it can be forced low to disable the output stage and
effectively disconnect the load.
The OPA549 is available in an 11-lead power package. Its
copper tab allows easy mounting to a heat sink for excellent
thermal performance. Operation is specified over the ex-
tended industrial temperature range, –40°C to +85°C.
FEATURES
●HIGH OUTPUT CURRENT:
8A Continuous
10A Peak
●WIDE POWER-SUPPLY RANGE:
Single Supply: +8V to +60V
Dual Supply: ±4V to ±30V
●WIDE OUTPUT VOLTAGE SWING
●FULLY PROTECTED:
Thermal Shutdown
Adjustable Current Limit
●OUTPUT DISABLE CONTROL
●THERMAL SHUTDOWN INDICATOR
●HIGH SLEW RATE: 9V/µs
●CONTROL REFERENCE PIN
●11-LEAD POWER PACKAGE
APPLICATIONS
●VALVE, ACTUATOR DRIVERS
●SYNCHRO, SERVO DRIVERS
●POWER SUPPLIES
●TEST EQUIPMENT
●TRANSDUCER EXCITATION
●AUDIO POWER AMPLIFIERS
OPA549
V+
E/S
RCL
RCL sets the current limit
value from 0A to 10A.
(Very Low Power Dissipation)
ILIM
VO
V–
Ref
ES Pin
Forced Low: Output disabled.
Indicates Low: Thermal shutdown.
OPA549
OPA549
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PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 1999-2005, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SBOS093E – MARCH 1999 – REVISED OCTOBER 2005
All trademarks are the property of their respective owners.
HEHHEHHHEH
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Output Current ................................................ See SOA Curve (Figure 6)
Supply Voltage, V+ to V–................................................................... 60V
Input Voltage Range....................................... (V–) – 0.5V to (V+) + 0.5V
Input Shutdown Voltage ................................................... Ref – 0.5 to V+
Operating Temperature ..................................................–40°C to +125°C
Storage Temperature .....................................................–55°C to +125°C
Junction Temperature ...................................................................... 150°C
Lead Temperature (soldering, 10s) ................................................. 300°C
ESD Capability (Human Body Model)............................................. 2000V
NOTE: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may de-
grade device reliability.
CONNECTION DIAGRAM
–In
+In Ref I
LIM
E/S
V+V
O
1357911
246810
V–
Tab connected to V–. Do not use to conduct current.
Connect both pins 1 and 2 to output.
Connect both pins 5 and 7 to V–.
Connect both pins 10 and 11 to V+.
ABSOLUTE MAXIMUM RATINGS(1)
For the most current package and ordering information, see
the Package Option Addendum at the end of this datasheet
or see the TI website at www.ti.com.
PACKAGE/ORDERING INFORMATION
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instru-
ments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may be
more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
*5“ TEXAS INSTRUM ENTS
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ELECTRICAL CHARACTERISTICS
Boldface limits apply over the specified temperature range, TA = –40°C to +85°C.
At TCASE = +25°C, VS = ±30V, Ref = 0V, and E/S pin open, unless otherwise noted.
OPA549T, S
PARAMETER CONDITION MIN TYP MAX UNITS
OFFSET VOLTAGE VOS
Input Offset Voltage VCM = 0V, IO = 0 ±1±5mV
vs Temperature dVOS/dT TCASE = –40°C to +85°C±20 µV/°C
vs Power Supply PSRR VS = ±4V to ±30V, Ref = V–25 100 µV/V
INPUT BIAS CURRENT(1)
Input Bias Current(2) IBVCM = 0V –100 –500 nA
vs Temperature TCASE = –40°C to +85°C±0.5 nA/°C
Input Offset Current IOS VCM = 0V ±5±50 nA
NOISE
Input Voltage Noise Density enf = 1kHz 70 nV/√Hz
Current Noise Density inf = 1kHz 1 pA/√Hz
INPUT VOLTAGE RANGE
Common-Mode Voltage Range: Positive VCM Linear Operation (V+) – 3 (V+) – 2.3 V
Negative VCM Linear Operation (V–) – 0.1 (V–) – 0.2 V
Common-Mode Rejection Ratio CMRR VCM = (V–) – 0.1V to (V+) – 3V 80 95 dB
INPUT IMPEDANCE
Differential 107 || 6 Ω || pF
Common-Mode 109 || 4 Ω || pF
OPEN-LOOP GAIN
Open-Loop Voltage Gain AOL VO = ±25V, RL = 1kΩ100 110 dB
VO = ±25V, RL = 4Ω100 dB
FREQUENCY RESPONSE
Gain Bandwidth Product GBW 0.9 MHz
Slew Rate SR G = 1, 50Vp-p Step, RL = 4Ω9V/µs
Full-Power Bandwidth See Typical Curve
Settling Time: ±0.1% G = –10, 50V Step 20 µs
Total Harmonic Distortion + Noise(3) THD+N
f = 1kHz,R
L
= 4Ω,G = +3, Power = 25W
0.015 %
OUTPUT
Voltage Output, Positive IO = 2A (V+) – 3.2 (V+) – 2.7 V
Negative IO = –2A (V–) + 1.7 (V–) + 1.4 V
Positive IO = 8A (V+) – 4.8 (V+) – 4.3 V
Negative IO = –8A (V–) + 4.6 (V–) + 3.9 V
Negative RL = 8Ω to V–(V–) + 0.3 (V–) + 0.1 V
Maximum Continuous Current Output: dc(4) ±8A
ac(4)
Waveform Cannot Exceed 10A peak
8A rms
Output Current Limit
Current Limit Range 0 to ±10 A
Current Limit Equation ILIM = 15800 • 4.75V/(7500Ω + RCL)A
Current Limit Tolerance(1) RCL = 7.5kΩ (ILIM = ±5A), RL = 4Ω±200 ±500 mA
Capacitive Load Drive (Stable Operation) CLOAD See Typical Curve
Output Disabled
Leakage Current Output Disabled, VO = 0V –2000 ±200 +2000 µA
Output Capacitance Output Disabled 750 pF
OUTPUT ENABLE/STATUS (E/S) PIN
Shutdown Input Mode
VE/S High (output enabled) E/S Pin Open or Forced High (Ref) + 2.4 V
VE/S Low (output disabled) E/S Pin Forced Low (Ref) + 0.8 V
IE/S High (output enabled) E/S Pin Indicates High –50 µA
IE/S Low (output disabled) E/S Pin Indicates Low –55 µA
Output Disable Time 1µs
Output Enable Time 3µs
Thermal Shutdown Status Output
Normal Operation Sourcing 20µA (Ref) + 2.4 (Ref) + 3.5 V
Thermally Shutdown Sinking 5µA, TJ > 160°C (Ref) + 0.2 (Ref) + 0.8 V
Junction Temperature, Shutdown +160 °C
Reset from Shutdown +140 °C
Ref (Reference Pin for Control Signals)
Voltage Range V–(V+) – 8V
Current(2) –3.5 mA
POWER SUPPLY
Specified Voltage VS±30 V
Operating Voltage Range, (V+) – (V–)860V
Quiescent Current IQILIM Connected to Ref IO = 0 ±26 ±35 mA
Quiescent Current in Shutdown Mode ILIM Connected to Ref ±6mA
TEMPERATURE RANGE
Specified Range –40 +85 °C
Operating Range –40 +125 °C
Storage Range –55 +125 °C
Thermal Resistance,
θ
JC 1.4 °C/W
Thermal Resistance,
θ
JA No Heat Sink 30 °C/W
NOTES: (1) High-speed test at TJ = +25°C. (2) Positive conventional current is defined as flowing into the terminal. (3) See “Total Harmonic Distortion + Noise vs
Frequency” in the Typical Characteristics section for additional power levels. (4) See “Safe Operating Area” (SOA) in the Typical Characteristics section.
{4‘ TEXAS INSTRUM ENTS
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TYPICAL CHARACTERISTICS
At TCASE = +25°C, VS = ±30V, and E/S pin open, unless otherwise noted.
–60 –40 –20 0 20 40 60 80 140120100
–130
–120
–110
–100
–90
–80
–70
–60
–50
–40
Input Bias Current (nA)
Temperature (°C)
INPUT BIAS CURRENT vs TEMPERATURE
–IB
+IB
–30 –20 –100 102030
–200
–180
–160
–140
–120
–100
–80
–60
–40
–20
–0
Input Bias Current (nA)
Common-Mode Voltage (V)
INPUT BIAS CURRENT
vs COMMON-MODE VOLTAGE
1 10 100 1k 10k 100k 1M 10M
120
100
80
60
40
20
0
–20
–40
0
–20
–40
–60
–80
–100
–120
–140
–160
Gain (dB)
Phase (°)
Frequency (Hz)
OPEN-LOOP GAIN AND PHASE
vs FREQUENCY
0 5 10 15 20 25 30
9
8
7
6
5
4
3
2
1
0
Current Limit (A)
Supply Voltage (V)
CURRENT LIMIT vs SUPPLY VOLTAGE
+ILIM, 5A
–ILIM, 5A
+ILIM, 2A
–ILIM, 2A
+ILIM, 8A
–ILIM, 8A
–75 –50 –25 0 25 50 75 100 125
30
25
20
15
10
5
0
Quiescent Current (mA)
Temperature (°C)
QUIESCENT CURRENT vs TEMPERATURE
VS = ±30V
VS = ±5V
IQ Shutdown (output disabled)
–75 –50 –25 0 25 50 75 100 125
9
8
7
6
5
4
3
2
1
0
Current Limit (A)
Temperature (°C)
CURRENT LIMIT vs TEMPERATURE
5A
2A
8A
Vuuage Nmse (nv Am / / {I TEXAS INSTRUM ENTS
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TYPICAL CHARACTERISTICS (Cont.)
At TCASE = +25°C, VS = ±30V, and E/S pin open, unless otherwise noted.
1 10 100 1k 10k 100k
300
250
200
150
100
50
0
Voltage Noise (nV/√Hz)
Frequency (Hz)
VOLTAGE NOISE DENSITY vs FREQUENCY
10 100 1k 10k 100k 1M
120
100
80
60
40
20
0
Power-Supply Rejection Ratio (dB)
Frequency (Hz)
POWER-SUPPLY REJECTION RATIO
vs FREQUENCY
–PSRR
+PSRR
–75 –50 0 50 100
AOL
125
120
110
100
90
80
AOL, CMRR, PSRR (dB)
Temperature (°C)
OPEN-LOOP GAIN, COMMON-MODE REJECTION RATIO,
AND POWER-SUPPLY REJECTION RATIO
vs TEMPERATURE
CMRR
PSRR
20 100 1k 10k 20k
1
0.1
0.01
0.001
THD+N (%)
Frequency (Hz)
TOTAL HARMONIC DISTORTION + NOISE
vs FREQUENCY
G = +3
RL = 4Ω
0.1W 1W
10W
75W
–75 –50 –25 0 25 50 75 100 125
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
16
15
14
13
12
11
10
9
8
7
6
Gain-Bandwidth Product (MHz)
Slew Rate (V/µs)
Temperature (°C)
GAIN-BANDWIDTH PRODUCT AND
SLEW RATE vs TEMPERATURE
SR+
SR–
GBW
10 100 1k 10k 100k
100
90
80
70
60
50
40
Common-Mode Rejection (dB)
Frequency (Hz)
COMMON-MODE REJECTION RATIO vs FREQUENCY
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TYPICAL CHARACTERISTICS (Cont.)
At TCASE = +25°C, VS = ±30V, and E/S pin open, unless otherwise noted.
5
4
3
2
1
0
VSUPPLY– VOUT(V)
Temperature (°C)
OUTPUT VOLTAGE SWING vs TEMPERATURE
–75 –50 –25 0 25 50 75 100 125
IO = +8A
IO = –8A
IO = +2A
IO = –2A
1k 10k 100k 1M
30
25
20
15
10
5
0
Output Voltage (Vp)
Frequency (Hz)
MAXIMUM OUTPUT VOLTAGE SWING
vs FREQUENCY
Maximum output
voltage without
slew rate-induced
distortion.
0246810
5
4
3
2
1
0
V
SUPPLY
– V
OUT
(V)
Output Current (A)
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
(V+) – V
O
(V–) – V
O
–40 –30 –20 –10 0 10 20 4030
5
4
3
2
1
0
–1
–2
–3
–4
–5
Leakage Current (mA)
Output Voltage (V)
OUTPUT LEAKAGE CURRENT
vs APPLIED OUTPUT VOLTAGE
RCL = ∞
RCL = 0
Leakage current with output disabled.
OFFSET VOLTAGE
PRODUCTION DISTRIBUTION
Percent of Amplifiers (%)
Offset Voltage (mV)
–4.7
–4.23
–3.76
–3.29
–2.82
–2.35
–1.88
–1.41
–0.94
–0.47
0
0.47
0.94
1.41
1.88
2.35
2.82
3.29
3.76
4.23
4.7
25
20
15
10
5
0
OFFSET VOLTAGE DRIFT
PRODUCTION DISTRIBUTION
Percent of Amplifiers (%)
Offset Voltage (µV/°C)
0
4
8
12
16
20
24
28
32
36
40
44
48
52
56
60
64
68
72
76
80
84
25
20
15
10
5
0
OPA549
SBOS093E 7
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TYPICAL CHARACTERISTICS (Cont.)
At TCASE = +25°C, VS = ±30V, and E/S pin open, unless otherwise noted.
0 5k 10k 15k 20k 25k 30k 35k
70
60
50
40
30
20
10
0
Overshoot (%)
Load Capacitance (pF)
SMALL-SIGNAL OVERSHOOT
vs LOAD CAPACITANCE
G = –1
G = +1
LARGE-SIGNAL STEP RESPONSE
G = 3, CL = 1000pF
10V/div
5µs/div
SMALL-SIGNAL STEP RESPONSE
G = 1, CL = 1000pF
50mV/div
2.5µs/div
SMALL-SIGNAL STEP RESPONSE
G = 3, CL = 1000pF
100mV/div
2.5µs/div
~(F ~(P {4‘ TEXAS INSTRUM ENTS
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APPLICATIONS INFORMATION
Figure 1 shows the OPA549 connected as a basic noninverting
amplifier. The OPA549 can be used in virtually any op amp
configuration.
Power-supply terminals should be bypassed with low series
impedance capacitors. The technique shown in Figure 1, using
a ceramic and tantalum type in parallel, is recommended.
Power-supply wiring should have low series impedance.
Be sure to connect
both
output pins (pins 1 and 2).
CONTROL REFERENCE (Ref) PIN
The OPA549 features a reference (Ref) pin to which the ILIM
and the E/S pin are referred. Ref simply provides a reference
point accessible to the user that can be set to V–, ground, or
any reference of the user’s choice. Ref cannot be set below
the negative supply or above (V+) – 8V. If the minimum VS
is used, Ref must be set at V–.
ADJUSTABLE CURRENT LIMIT
The OPA549’s accurate, user-defined current limit can be set
from 0A to 10A by controlling the input to the ILIM pin. Unlike
other designs, which use a power resistor in series with the
output current path, the OPA549 senses the load indirectly.
This allows the current limit to be set with a 0µA to 633µA
control signal. In contrast, other designs require a limiting
resistor to handle the full output current (up to 10A in this
case).
Although the design of the OPA549 allows output currents up
to 10A, it is not recommended that the device be operated
continuously at that level. The highest rated continuous
current capability is 8A. Continuously running the OPA549 at
output currents greater than 8A will degrade long-term reli-
ability.
Operation of the OPA549 with current limit less than 1A
results in reduced current limit accuracy. Applications requir-
ing lower output current may be better suited to the OPA547
or OPA548.
Resistor-Controlled Current Limit
See Figure 2a for a simplified schematic of the internal
circuitry used to set the current limit. Leaving the ILIM pin open
programs the output current to zero, while connecting ILIM
directly to Ref programs the maximum output current limit,
typically 10A.
With the OPA549, the simplest method for adjusting the
current limit uses a resistor or potentiometer connected
between the ILIM pin and Ref according to Equation 1:
R75kV
I–7.5k
CL LIM
=Ω
(1)
Refer to Figure 2 for commonly used values.
Digitally-Controlled Current Limit
The low-level control signal (0µA to 633µA) also allows the
current limit to be digitally controlled by setting either a
current (ISET) or voltage (VSET). The output current ILIM can be
adjusted by varying ISET according to Equation 2:
ISET = ILIM/15800 (2)
Figure 2b demonstrates a circuit configuration implementing
this feature.
The output current ILIM can be adjusted by varying VSET
according to Equation 3:
VSET = (Ref) + 4.75V – (7500W)(ILIM)/15800 (3)
Figure 11 demonstrates a circuit configuration implementing
this feature.
FIGURE 1. Basic Circuit Connections.
POWER SUPPLIES
The OPA549 operates from single (+8V to +60V) or dual
(±4V to ±30V) supplies with excellent performance. Most
behavior remains unchanged throughout the full operating
voltage range. Parameters that vary significantly with operat-
ing voltage are shown in the Typical Characteristics. Some
applications do not require equal positive and negative out-
put voltage swing. Power-supply voltages do not need to be
equal. The OPA549 can operate with as little as 8V between
the supplies and with up to 60V between the supplies. For
example, the positive supply could be set to 55V with the
negative supply at –5V. Be sure to connect both V– pins
(pins 5 and 7) to the negative power supply, and both V+
pins (pins 10 and 11) to the positive power supply.
Package tab is internally connected to V–; however, do
not use the tab to conduct current.
G = 1+
R2
R1
ZL
E/S
8
9
10, 11
3
4
5, 7
6
1, 2
R2
ILIM(1)
Ref
R1
0.1µF(2)
10µF
OPA549
V–
V+
+
+
VIN
10µF
0.1µF(2)
VO
NOTES: (1) ILIM connected to Ref gives the maximum
current limit, 10A (peak). (2) Connect capacitors directly to
package power-supply pins.
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FIGURE 2. Adjustable Current Limit.
ENABLE/STATUS (E/S) PIN
The Enable/Status Pin provides two unique functions:
1) output disable by forcing the pin low, and 2) thermal
shutdown indication by monitoring the voltage level at the
pin. Either or both of these functions can be utilized in an
application. For normal operation (output enabled), the E/S
pin can be left open or driven high (at least 2.4V above Ref).
A small value capacitor connected between the E/S pin and
CREF may be required for noisy applications.
Output Disable
To disable the output, the E/S pin is pulled to a logic low (no
greater than 0.8V above Ref). Typically the output is shut down
in 1µs. To return the output to an enabled state, the E/S pin
should be disconnected (open) or pulled to at least 2.4V above
Ref. It should be noted that driving the E/S pin high (output
enabled)
does not defeat internal thermal shutdown
; however,
it does prevent the user from monitoring the thermal shutdown
status. Figure 3 shows an example implementing this function.
This function not only conserves power during idle periods
(quiescent current drops to approximately 6mA) but also allows
multiplexing in multi-channel applications. See Figure 12 for two
OPA549s in a switched amplifier configuration. The on/off state
of the two amplifiers is controlled by the voltage on the E/S pin.
Under these conditions, the disabled device will behave like a
750pF load. Slewing faster than 3V/µs will cause leakage
current to rapidly increase in devices that are disabled, and will
contribute additional load. At high temperature (125°C), the
slewing threshold drops to approximately 2V/µs. Input signals
must be limited to avoid excessive slewing in multiplexed
applications.
FIGURE 3. Output Disable.
OPA549
E/S
CMOS or TTL
Ref
Logic
Ground
7500Ω
R
CL
0.01µF
(optional, for noisy
environments)
8
6
8
6
4.75V
R
CL
=
– 7500Ω
OPA549 CURRENT LIMIT: 0A to 10A
NOTES: (1) Resistors are nearest standard 1% values. (2) Offset in the current limit circuitry
may introduce approximately ±0.25A variation at low current limit values.
DESIRED
CURRENT LIMIT
0A
(2)
2.5A
3A
4A
5A
6A
7A
8A
9A
10A
RESISTOR
(1)
(R
CL
)
I
LIM
Open
22.6kΩ
17.4kΩ
11.3kΩ
7.5kΩ
4.99kΩ
3.24kΩ
1.87kΩ
845Ω
I
LIM
Connected to Ref
CURRENT
(I
SET
)
0µA
158µA
190µA
253µA
316µA
380µA
443µA
506µA
570µA
633µA
VOLTAGE
(V
SET
)
(Ref) + 4.75V
(Ref) + 3.56V
(Ref) + 3.33V
(Ref) + 2.85V
(Ref) + 2.38V
(Ref) + 1.90V
(Ref) + 1.43V
(Ref) + 0.95V
(Ref) + 0.48V
(Ref)
(a) RESISTOR METHOD
15800 (4.75V)
I
LIM
=
– 7.5kΩ
75kΩ
I
LIM
7500Ω
I
SET
= I
LIM
/15800
V
SET
= (Ref) + 4.75V – (7500Ω) (I
LIM
)/15800
(b) DAC METHOD (Current or Voltage)
D/A
I
SET
4.75V
Ref
Ref
±I
LIM
=
Max I
O
= I
LIM
(4.75) (15800)
7500Ω + R
CL
Max I
O
= I
LIM
±I
LIM
=15800 I
SET
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SBOS093E
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Thermal Shutdown Status
The OPA549 has thermal shutdown circuitry that protects the
amplifier from damage. The thermal protection circuitry dis-
ables the output when the junction temperature reaches
approximately 160°C and allows the device to cool. When the
junction temperature cools to approximately 140°C, the output
circuitry is automatically re-enabled. Depending on load and
signal conditions, the thermal protection circuit may cycle on
and off. The E/S pin can be monitored to determine if the
device is in shutdown. During normal operation, the voltage on
the E/S pin is typically 3.5V above Ref. Once shutdown has
occurred, this voltage drops to approximately 200mV above
Ref. Figure 4 shows an example implementing this function.
FIGURE 4. Thermal Shutdown Status.
FIGURE 5. Output Disable and Thermal Shutdown Status.
FIGURE 6. Safe Operating Area.
External logic circuitry or an LED can be used to indicate if
the output has been thermally shutdown, see Figure 10.
Output Disable and Thermal Shutdown Status
As mentioned earlier, the OPA549’s output can be disabled
and the disable status can be monitored simultaneously.
Figure 5 provides an example of interfacing to the E/S pin.
SAFE OPERATING AREA
Stress on the output transistors is determined both by the
output current and by the output voltage across the conduct-
ing output transistor, VS – VO. The power dissipated by the
output transistor is equal to the product of the output current
and the voltage across the conducting transistor, VS – VO.
The Safe Operating Area (SOA curve, Figure 6) shows the
permissible range of voltage and current.
The safe output current decreases as VS – V
O increases.
Output short circuits are a very demanding case for SOA. A
short circuit to ground forces the full power-supply voltage
(V+ or V–) across the conducting transistor. Increasing the
case temperature reduces the safe output current that can be
tolerated without activating the thermal shutdown circuit of
the OPA549. For further insight on SOA, consult Application
Report SBOA022 at the Texas Instruments web site
(www.ti.com).
POWER DISSIPATION
Power dissipation depends on power supply, signal, and load
conditions. For dc signals, power dissipation is equal to the
product of output current times the voltage across the con-
ducting output transistor. Power dissipation can be mini-
mized by using the lowest possible power-supply voltage
necessary to assure the required output voltage swing.
For resistive loads, the maximum power dissipation occurs at
a dc output voltage of one-half the power-supply voltage.
Dissipation with ac signals is lower. Application Bulletin
SBOA022 explains how to calculate or measure power
dissipation with unusual signals and loads.
THERMAL PROTECTION
Power dissipated in the OPA549 will cause the junction
temperature to rise. Internal thermal shutdown circuitry shuts
down the output when the die temperature reaches approxi-
mately 160°C and resets when the die has cooled to 140°C.
Depending on load and signal conditions, the thermal protec-
tion circuit may cycle on and off. This limits the dissipation of
the amplifier but may have an undesirable effect on the load.
Any tendency to activate the thermal protection circuit indi-
cates excessive power dissipation or an inadequate heat
sink. For reliable operation, junction temperature should be
limited to 125°C maximum. To estimate the margin of safety
in a complete design (including heat sink) increase the
ambient temperature until the thermal protection is triggered.
12 510
V
S
– V
O
(V)
20 50 100
10
20
1
Output Current (A)
0.1
Pulse Operation Only
(Limit rms current to ≤ 8A)
Output current can
be limited to less
than 8A—see text.
T
C
= 125°C
T
C
= 85°C
T
C
= 25°C
PD = 90W
PD = 47W
PD = 18W
OPA549
E/S
HCT
Logic
Ground
Ref
E/S pin can interface
with standard HCT logic
inputs. Logic ground is
referred to Ref.
OPA549
E/S
Open Drain
(Output Disable)
HCT
(Thermal Status
Shutdown)
Logic
Ground
Ref
Open-drain logic output can disable
the amplifier's output with a logic low.
HCT logic input monitors thermal
shutdown status during normal
operation.
{4‘ TEXAS INSTRUM ENTS
OPA549
SBOS093E 11
www.ti.com
Use worst-case load and signal conditions. For good reliabil-
ity, thermal protection should trigger more than 35°C above
the maximum expected ambient condition of your applica-
tion. This produces a junction temperature of 125°C at the
maximum expected ambient condition.
The internal protection circuitry of the OPA549 was designed
to protect against overload conditions. It was not intended to
replace proper heat sinking. Continuously running the OPA549
into thermal shutdown will degrade reliability.
AMPLIFIER MOUNTING AND HEAT SINKING
Most applications require a heat sink to assure that the
maximum operating junction temperature (125°C) is not
exceeded. In addition, the junction temperature should be
kept as low as possible for increased reliability. Junction
temperature can be determined according to the Equations:
TJ = TA + PD
θ
JA (4)
where
θ
JA =
θ
JC +
θ
CH +
θ
HA (5)
TJ= Junction Temperature (°C)
TA= Ambient Temperature (°C)
PD= Power Dissipated (W)
θ
JC = Junction-to-Case Thermal Resistance (°C/W)
θ
CH = Case-to-Heat Sink Thermal Resistance (°C/W)
θ
HA = Heat Sink-to-Ambient Thermal Resistance (°C/W)
θ
JA = Junction-to-Air Thermal Resistance (°C/W)
Figure 7 shows maximum power dissipation versus ambient
temperature with and without the use of a heat sink. Using a
heat sink significantly increases the maximum power dissipa-
tion at a given ambient temperature, as shown in Figure 7.
The challenge in selecting the heat sink required lies in
determining the power dissipated by the OPA549. For dc
output, power dissipation is simply the load current times the
voltage developed across the conducting output transistor,
PD = IL (VS – VO). Other loads are not as simple. Consult the
SBOA022 Application Report for further insight on calculat-
ing power dissipation. Once power dissipation for an applica-
tion is known, the proper heat sink can be selected.
Heat Sink Selection Example—An 11-lead power ZIP pack-
age is dissipating 10 Watts. The maximum expected ambient
temperature is 40°C. Find the proper heat sink to keep the
junction temperature below 125°C (150°C minus 25°C safety
margin).
Combining Equations (4) and (5) gives:
TJ = TA + PD (
θ
JC +
θ
CH +
θ
HA ) (6)
TJ, TA, and PD are given.
θ
JC is provided in the Specifications
Table, 1.4°C/W (dc).
θ
CH can be obtained from the heat sink
manufacturer. Its value depends on heat sink size, area, and
material used. Semiconductor package type, mounting screw
torque, insulating material used (if any), and thermal joint
compound used (if any) also affect
θ
CH. A typical
θ
CH for a
mounted 11-lead power ZIP package is 0.5°C/W. Now we
can solve for
θ
HA:
θ
HA = [(TJ – TA)/PD] –
θ
JC –
θ
CH
θ
HA = [(125°C – 40°C)/10W] – 1.4°C/W – 0.5°C/W
θ
HA = 6.6°C/W
To maintain junction temperature below 125°C, the heat sink
selected must have a
θ
HA
less than 6.6°C/W. In other words,
the heat sink temperature rise above ambient must be less
than 66°C (6.6°C/W • 10W). For example, at 10W Thermalloy
model number 6396B has a heat sink temperature rise of 56°C
(
θ
HA
= 56°C/10W = 5.6°C/W), which is below the required 66°C
required in this example. Thermalloy model number 6399B has
a sink temperature rise of 33°C (
θ
HA
= 33°C/10W = 3.3°C/W),
which is also below the required 66°C required in this example.
Figure 7 shows power dissipation versus ambient temperature
for a 11-lead power ZIP package with the Thermalloy 6396B
and 6399B heat sinks.
FIGURE 7. Maximum Power Dissipation vs Ambient Temperature.
Another variable to consider is natural convection versus
forced convection air flow. Forced-air cooling by a small fan
can lower
θ
CA (
θ
CH +
θ
HA) dramatically. Some heat sink
manufacturers provide thermal data for both of these cases.
Heat sink performance is generally specified under idealized
conditions that may be difficult to achieve in an actual
application. For additional information on determining heat
sink requirements, consult Application Report SBOA021.
m {4‘ TEXAS INSTRUM ENTS
OPA549
SBOS093E
12 www.ti.com
avoided with clamp diodes from the output terminal to the
power supplies, as shown in Figure 8. Schottky rectifier
diodes with a 8A or greater continuous rating are recom-
mended.
VOLTAGE SOURCE APPLICATION
Figure 9 illustrates how to use the OPA549 to provide an
accurate voltage source with only three external resistors.
First, the current limit resistor, RCL, is chosen according to
the desired output current. The resulting voltage at the ILIM
pin is constant and stable over temperature. This voltage,
VCL, is connected to the noninverting input of the op amp and
used as a voltage reference, thus eliminating the need for an
external reference. The feedback resistors are selected to
gain VCL to the desired output voltage level.
As mentioned earlier, once a heat sink has been selected,
the complete design should be tested under worst-case load
and signal conditions to ensure proper thermal protection.
Any tendency to activate the thermal protection circuitry may
indicate inadequate heat sinking.
The tab of the 11-lead power ZIP package is electrically
connected to the negative supply, V–. It may be desirable to
isolate the tab of the 11-lead power ZIP package from its
mounting surface with a mica (or other film) insulator. For
lowest overall thermal resistance, it is best to isolate the
entire heat sink/OPA549 structure from the mounting surface
rather than to use an insulator between the semiconductor
and heat sink.
OUTPUT STAGE COMPENSATION
The complex load impedances common in power op amp
applications can cause output stage instability. For normal
operation, output compensation circuitry is typically not re-
quired. However, for difficult loads or if the OPA549 is in-
tended to be driven into current limit, an R/C network may be
required. Figure 8 shows an output R/C compensation (snub-
ber) network which generally provides excellent stability.
FIGURE 8. Motor Drive Circuit.
FIGURE 9. Voltage Source.
G = – = –4
R
2
R
1
10Ω
(Carbon)
0.01µF
R
2
20kΩ
R
1
5kΩ
OPA549
V–
V+
V
IN
Motor
D
1
D
2
D
1
, D
2
: Schottky Diodes
7500Ω
R
CL
I
LIM
0.01µF
(Optional, for noisy
environments)
4.75V
I
O
=15800 (4.75V)
7500Ω + R
CL
V
O
= V
CL
(1 + R
2
/R
1
)
Ref
V+
V
CL
V
CL
= = 1V
Desired V
O
= 10V,
R
1
= 1kΩ and R
2
= 9kΩ
G = = 10
10
1
For Example:
2kΩ • 4.75V
(2kΩ + 7500Ω)
If I
LIM
= 7.9A, R
CL
=
2kΩ
V–
R
2
R
1
Uses voltage developed at I
LIM
pin
as a moderately accurate reference
voltage.
A snubber circuit may also enhance stability when driving
large capacitive loads (> 1000pF) or inductive loads (motors,
loads separated from the amplifier by long cables). Typically,
3Ω to 10Ω resistors in series with 0.01µF to 0.1µF capacitors
is adequate. Some variations in circuit values may be required
with certain loads.
OUTPUT PROTECTION
Reactive and EMF-generating loads can return load current
to the amplifier, causing the output voltage to exceed the
power-supply voltage. This damaging condition can be
PROGRAMMABLE POWER SUPPLY
A programmable source/sink power supply can easily be
built using the OPA549. Both the output voltage and output
current are user-controlled. See Figure 10 for a circuit using
potentiometers to adjust the output voltage and current while
Figure 11 uses DACs. An LED connected to the E/S pin
through a logic gate indicates if the OPA549 is in thermal
shutdown.
INSTRUM ENTS *5“ TEXAS
OPA549
SBOS093E 13
www.ti.com
FIGURE 10. Resistor-Controlled Programmable Power Supply.
FIGURE 11. Digitally-Controlled Programmable Power Supply.
G = 1 + = 10
9kΩ
1kΩ
9kΩ1kΩ
OPA549
+5V
+5V
0.12V to 2.5V
0V to 4.75V
Output
Adjust
Thermal
Shutdown Status (LED)
74HCT04 R ≥ 250Ω
E/S
V
O
= 1V to 25V
I
O
= 0 to 10A
9
6
8
4
3
Ref
I
LIM
10.5kΩ
499Ω
10kΩ
Current
Limit
Adjust
1kΩ
20kΩ0.01µF
V–
V+ = +30V
V– = 0V
DAC B
1/2 DAC7800/1/2
1/2 DAC7800/1/2
(3)
10pF
I
OUT B
R
FB B
AGND B
0.01µF
I
LIM
Thermal
Shutdown Status (LED)
74HCT04 R ≥ 250Ω
9kΩ1kΩ
V
O
= 7V to 25V
V+ = +30V
V– = 0V
I
O
= 0A to 10A
G = 10
Ref
8
9
1, 2
E/S
6
4
3
DAC A
+5V
+5V
V
REF B
DGND
10pF
I
OUT A
R
FB A
OUTPUT ADJUST
OPA549
CURRENT LIMIT ADJUST
AGND A
V
REF A
Choose DAC780X based on digital interface: DAC7800—12-bit
interface, DAC7801—8-bit interface + 4 bits, DAC7802—serial interface.
1/2
OPA2336
1/2
OPA2336
V
REF
–5V
ES ES 0PA549 + *5“ TEXAS INSTRUM ENTS
OPA549
SBOS093E
14 www.ti.com
FIGURE 13. Multiple Current Limit Values.
FIGURE 12. Switched Amplifier.
FIGURE 14. Parallel Output for Increased Output Current.
E/S
R2
R1
VIN1
OPA549
VO
E/S
R4
R3
Limit output slew rates to ≤ 3V/µs (see text).
VE/S VIN2
OPA549
OPA549
R
CL2
R
CL1
Ref
Close for high current
(could be open drain
output of a logic gate).
I
LIM
I
LIM
Ref
Ref
R
1
1kΩR
2
4kΩ
OPA549
OPA549
V
O
G = 5
V
IN
0.1Ω
0.1Ω
I
LIM
Master
Slave
20A Peak
TEXAS INSTRUMENTS Samples Sample: Sample: Samples
PACKAGE OPTION ADDENDUM
www.ti.com 13-Aug-2021
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead finish/
Ball material
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
OPA549S ACTIVE Power Package KVC 11 25 RoHS & Green SN N / A for Pkg Type -40 to 85 OPA549S
OPA549SG3 ACTIVE Power Package KVC 11 25 RoHS & Green SN N / A for Pkg Type -40 to 85 OPA549S
OPA549T ACTIVE TO-220 KV 11 25 RoHS & Green SN N / A for Pkg Type -40 to 85 OPA549T
OPA549TG3 ACTIVE TO-220 KV 11 25 RoHS & Green SN N / A for Pkg Type -40 to 85 OPA549T
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
I TEXAS INSTRUMENTS
PACKAGE OPTION ADDENDUM
www.ti.com 13-Aug-2021
Addendum-Page 2
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
l TEXAS INSTRUMENTS T - Tube height| L - Tube length l ,g + w-Tuhe _______________ _ ______________ width 47 — B - Alignment groove width
TUBE
*All dimensions are nominal
Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm)
OPA549S KVC TO-OTHER 11 25 532.13 36.32 13340 NA
OPA549SG3 KVC TO-OTHER 11 25 532.13 36.32 13340 NA
OPA549T KV TO-220 11 25 532.13 36.32 13340 NA
OPA549TG3 KV TO-220 11 25 532.13 36.32 13340 NA
PACKAGE MATERIALS INFORMATION
www.ti.com 5-Jan-2022
Pack Materials-Page 1
MECHANICAL DATA ch (R—PSFM—T1 1) PLASTIC FLANGE—MOUNT 0452 (386) 2,148 (375) fl \ r 0798 (20727) 7 X©\ 0775 (49,76) 0‘40279] 44—»0594 (40,047 0094 (4763) 0074 (47,04) 0437 ( 0427 ( I: 3m 1 0044 (4‘04) 0 (0,59) Emmmmv 4' PL 01‘2 (2,85) 092 (2,54) 0 74 (06') *k 0 14 (0,36) ‘4 PL 4202951/(2 09/04 NO'ES: Tm drowmq 45 sums Cnm> AH Hnec' dimensmrs c'e m mc'ves Mummers) >0 change wnrau: nohce. Conthmq mmensmn in inches mus wmmn we 440740744 Rcrcrcncc My body dimensxcns ow (exam 1:; \ead rommg d‘mensmns) {'3 Ms INSTRUMENTS www.li.com
MECHANICAL DATA KV (R7F7FM77’D Fl ASTC fl A\G’7MOUV7 NO’ES: rrccm> AH Hnec' dimensmrs c'e m ‘mmes ['n'flhme‘ers) TH: drawer ‘5 subject :0 change mm: nohce, Commumg cwmenswon‘ mar N \ccc dw'mcnswons appw ac‘o'c 5mm mp FuHs WWW JEJEC M07434}: *9 MAS INSTRUMENTS www.ti.com
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