HD155111F Datasheet PDF - Hitachi -> Renesas Electronics

Description
The HD155111F was developed for PCN (DCS1800) cellular systems, and integrates most of the functions of a transceiver. The HD155111F incorporates the bias circuit for a RF LNA, a 1st mixer, 1st-IF amplifier, 2nd mixer, AGC amplifier and an IQ quadrature demodulator for the receiver, and an IQ quadrature modulator and offset PLL for the transmitter. Also, on chip are the dividers for the 1st & 2nd local oscillator signals and 90˚ phase splitter. Moreover the HD155111F includes control circuits to implement power saving modes. These functions can operate down to 2.7 V and are housed in a 48-pin LQFP SMD package.

Features
• Highly integrated RF processing for hand-portables
• Wide operating frequency
   RX:
   ― RF: 1805 to 1880 MHz
   ― 1st IF: 130 to 300 MHz
   ― 2nd IF: 26 to 60 MHz
   TX:
   ― RF: 1710 to 1785 MHz
   ― IF: 120 to 180 MHz
• Offset PLL architecture reduces TX spurious
• Low current consumption (Vcc = 3 V)
   RX mode: 42.5 mA Typ (including IFVCO current (2.5 mA Typ)) + LNA transistor current (5.6 mA Typ)
   TX mode: 38.0 mA Typ (including IFVCO current (2.5 mA Typ))
   Idle mode: 1 µA Typ
• Operating supply voltage:
   ― Phase comparator and TX VCO driver circuits: 2.7 to 5.25 V
   ― Other blocks: 2.7 to 3.6 V
• Operating temperature range: –20 to +75°C
• 48 pin SMD Low Profile Quad Flat Package (LQFP): FP-48